2023-06-23 02:40 AM
Hi all,
The development board we are using STM32MP157C-YA157C from Myirtech is running Ubuntu 18 with openstlinux.
I am trying to interface the usart1 with another module but by default, the peripheral is not enabled from device tree.
So, I modified the device tree as follows (pins z6 and z7 are used by usart1) according to the document of ST :
usart1_pins_a: usart1-0 {
pins1 {
pinmux = <STM32_PINMUX('Z', 7, AF7)>; /* UART1_TX */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* UART1_RX */
bias-disable;
};
};
usart1_idle_pins_a: usart1-idle-0 {
pins1 {
pinmux = <STM32_PINMUX('Z', 7, ANALOG)>; /* UART1_TX */
};
pins2 {
pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* UART1_RX */
bias-disable;
};
};
usart1_sleep_pins_a: usart1-sleep-0 {
pins {
pinmux = <STM32_PINMUX('Z', 7, ANALOG)>, /* UART1_TX */
<STM32_PINMUX('Z', 6, ANALOG)>; /* UART1_RX */
};
};
&usart1 {
pinctrl-names = "default", "sleep", "idle"; /* pin configurations definition */
pinctrl-0 = <&usart1_pins_a>; /* default pin configuration selection */
pinctrl-1 = <&usart1_sleep_pins_a>; /* sleep pin configuration selection */
pinctrl-2 = <&usart1_idle_pins_a>; /* idle pin configuration selection */
status = "okay"; /* device activation */
};
aliases {
ethernet0 = ðernet0;
serial0 = &uart4;
serial1 = &usart1;
serial2 = &uart8;//rs232
serial3 = &uart5;//rs485
serial4 = &uart7;//bt
};
usart1: serial@5c000000 {
compatible = "st,stm32h7-uart";
reg = <0x5c000000 0x400>;
interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>;
//clocks = <&scmi0_clk CK_SCMI0_USART1>;
//resets = <&scmi0_reset RST_SCMI0_USART1>;
clocks = <&rcc USART1_K>;
resets = <&rcc USART1_R>;
wakeup-source;
power-domains = <&pd_core>;
status = "disabled";
};
On boot up, the kernel cannot enable the usart1 module (5c000000):
[ 1.961813] stm32-usart 40010000.serial: interrupt mode for rx (no dma)
[ 1.961838] stm32-usart 40010000.serial: interrupt mode for tx (no dma)
[ 1.961877] 40010000.serial: ttySTM0 at MMIO 0x40010000 (irq = 57, base_baud = 4000000) is a stm32-usart
[ 3.239179] 40011000.serial: ttySTM3 at MMIO 0x40011000 (irq = 58, base_baud = 4000000) is a stm32-usart
[ 3.249682] 40018000.serial: ttySTM4 at MMIO 0x40018000 (irq = 59, base_baud = 4000000) is a stm32-usart
[ 3.264333] 40019000.serial: ttySTM2 at MMIO 0x40019000 (irq = 60, base_baud = 4000000) is a stm32-usart
[ 3.279710] stm32-usart: probe of 5c000000.serial failed with error -22
The clock summary is as follows (grep -E "clock|usart" /sys/kernel/debug/clk/clk_summary | sed 's,\s\+, ,g' | column -t):
clock count count count rate accuracy phase cycle
usart1_k 0 0 0 64000000 0 0 50000
usart3_k 0 0 0 64000000 0 0 50000
usart2_k 0 0 0 64000000 0 0 50000
usart6 0 0 0 104438965 0 0 50000
usart3 0 0 0 104438965 0 0 50000
usart2 0 0 0 104438965 0 0 50000
I noticed that the usart1_k clock is not enabled. How can I enable it?
What am I missing?
Thank you.
Best regards,
Mert
Solved! Go to Solution.
2023-06-26 02:44 AM
Hi @mertt
I think it miss to enable and provide a source clock to UART1 clock in Tf-a Device Tree
st,pkcs = <
...CLK_UART1_DISABLED
CLK_UART1_HSI
...
>;
Olivier
In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.
2023-06-26 02:44 AM
Hi @mertt
I think it miss to enable and provide a source clock to UART1 clock in Tf-a Device Tree
st,pkcs = <
...CLK_UART1_DISABLED
CLK_UART1_HSI
...
>;
Olivier
In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.
2023-06-26 04:37 AM
Thank you for the answer.
In the file include/dt-bindings/clock/stm32mp1-clks.h, there are the following definitions:
#define USART1 64
...
#define CK_SCMI0_HSI 1
...
#define CK_SCMI0_USART1 20
I suspect that the kernel versions are different.
Under the rcc: rcc@50000000, I can use the following, if it is correct:
st,pkcs = <
...
CK_SCMI0_USART1
...
>;
Best regards,
Mert
2023-06-26 05:25 AM
> I think it miss to enable and provide a source clock to UART1 clock in Tf-a Device Tree
I missed the tf-a part, I will try to compile and change the boot partition again.
Best regards.
2023-06-26 05:27 AM
Hi @mertt
If you are using op-tee you may also have a look to Op-tee DT.
Olivier
2023-07-01 11:55 PM
It worked, thanks.
[3.270418] 5c000000.serial: ttySTM1 at MMIO 0x5c000000 (irq = 61, base_baud = 4000000) is a stm32-usart