SuperSpeed USB3.0 Peripheral configuration in U-Boot

[azcq]

Hello guys!

I am trying to configure U-Boot on a stm32mp257f-dk board so that I can use the “ums” command with SuperSpeed. 
After configuring the device tree, I managed to configure the usb3dr as usb3(as it says in the debug printf written on the terminal after calling the command). After doing this and running the “ums” command, in the console I get an error message saying “Cannot get PHY1 for usb@48300000”. After a little bit of research, I could not find a combophy driver in the U-Boot source code. 
Fast forward, I managed to do a configuration for the COMBOPHY(porting it from the linux driver), and it does not return any error. The command works now but it falls back silently from SuperSpeed to HighSpeed. 

My question is, even if the COMBOPHY is configured properly in U-Boot, is the dwc3-generic U-Boot driver capable of configuring the USB3DR peripheral to do the handshake for SuperSpeed?

I managed to verify the SuperSpeed in Linux so there isn't any Hardware problem related to the board or cable.

If it helps, here is the output of the "ums" command with the COMBOPHY configured, that falls back from SuperSpeed to HighSpeed.

STM32MP> ums 0 mmc 1


SD init

UMS: LUN 0, dev mmc 1, hwpart 0, sector 0x0, count 0xe90000


usb controller init

dwc3_generic_of_to_plat
No USB maximum speed specified. Using super speed
The glue_probe function has started

combophy probe


00000000f8059480: Probe started
00000000f8059480: Base address = 00000000480c0000
00000000f8059480: PHY Clock = 00000000f8082440
00000000f8059480: KER Clock = 00000000f80824c0
00000000f8059480: PAD Clock = 0000000000000000
00000000f8059480: PHY Reset = 00000000f8082c80
00000000f8059480: SYSCFG Regmap = 00000000f8070650
Function xLate ran succesfully


USB3-PHY Detected from DT -> 00000000f8059480
00000000f8059480: Setting USB3 ComboPHY: 3
Set mode -> type = 4

PLL INIT

KERCLK -> 00000000f80824c0
00000000f8059480: PLL Reference -> Ker
00000000f8059480: USB Combophy type: 4
00000000f8059480: Enabling clock with SSC
00000000f8059480: Set RX equalizer 7
00000000f8059480: Clock Rate -> 20000000
DWC3 Glue Clock Init OK
DWC3 Glue Reset Init OK
DWC3 PHY Detected in phy.dev OK
DWC3 PHY Powered ON OK
DWC3 child clk init OK
DWC3 child reset init OK
start of glue configureconfigured in usb3 mode
stm32 glue configureDWC3 child dr_mode while OK
Function xLate ran succesfully
00000000f8059480: Setting USB3 ComboPHY: 3
Set mode -> type = 4

PLL INIT

KERCLK -> 00000000f80824c0
00000000f8059480: PLL Reference -> Ker
00000000f8059480: USB Combophy type: 4
00000000f8059480: Enabling clock with SSC
00000000f8059480: Set RX equalizer 7
00000000f8059480: Clock Rate -> 20000000
USB3DR_GBL_GPMSTS -> 0x00000000
probe
USB3DR_GBL_GPMSTS -> 0x00000000
USB3DR_GBL_GUCTL1 -> 0x00d20014
USB3DR_GBL_GHWPARAMS0 -> 0x00d20034
USB3DR_GBL_GHWPARAMS1 -> 0x00d20054
USB3DR_GBL_GHWPARAMS3 -> 0x00d20074
USB3DR_GBL_GHWPARAMS6 -> 0x00d20094
USB3DR_GBL_GUSB3PIPECTL -> 0x00d200b4
USB3DR_DEV_DCFG -> 0x00d200dc
USB3DR_DEV_DCTL -> 0x00d200f4
USB3DR_DEV_DSTS -> 0x00d20114

Note: Many of the lines printed are inserted by me for debug purposes.

@PatrickF @Erwan SZYMANSKI