Clarification Regarding Use of S3_15_C2_C1_1 in cortex_a35_reset_func of BL2

[Aks]

Dear sir/Mam

While analyzing the reset handler code within the bl2.elf binary from Arm Trusted Firmware, we observed that the label S3_15_C2_C1_1 is being referenced in the cortex_a35_reset_func. We would like to request your clarification on the following points:

1. Could you please confirm whether S3_15_C2_C1_1 refers to a system register?

2. If so, is S3_15_C2_C1_1  the official name of the register?

Additionally, we would appreciate your guidance on where this register is documented and how it can be accessed (e.g., using MSR/MRS instructions or through a specific architectural feature of the Cortex-A35).

Thanks & Regards

Akshitha Pattem