2023-10-24 04:53 AM
Using the STM32WB55 SoC we are wondering, if it is possible to protect the shared RAM and FLASH memory from unintended access by CPU2 (the BLE and security dedicated M0+ core). As a minimum requirement we would need to be able to detect such violation due to safety constraints. There are some protection means in place in the other direction to protect CPU2 from CPU1 or the MPU just for CPU1. However, we'd also need to segregate / protect our user application from the ST wireless application as good as possible. Your advice is appreciated.