QSPI clock pausing before sending each byte when transmitting during data phase

[AHeck.2]

Hello,

I am using the STM32WB55 nucleo development kit to communicate over QSPI with an external memory device. I presently have the QSPI interface configured for DMA operation, and I am able to use the external device successfully. However, when transmitting data during the data phase of commands, I have captured a pause between bytes being transmitted, as shown below.

Note that on the left of the capture, the clock is toggling regularly while the address is sent. However, the clock then stops toggling, and only pulses to send a byte every ~240 ns.

The STM32 is clocked at 32 MHz, and has no prescalar, so the QSPI clock should also be at 32 MHz. This pause is not present during the command phase or address phase, and is not observed when receiving data, only when transmitting data.

Is this a known limitation of the QSPI peripheral?

The external peripheral is used for bulk data logging, and speed is very important for my application. It looks like a data transfer speed up of ~3x is being lost due to this "clock stretching". Has anyone seen this before, and were they able to eliminate it?

[Remy ISSALYS · Accepted solution]

Hello,

The clock stops when there isn't data inside the FIFO, so maybe your FIFO is empty between two data transmissions. Can you share your DMA and QSPI configuration? How many bits are you transmitting?

Best Regards