2026-03-24 11:02 AM - edited 2026-03-25 5:17 AM
Hi,
I am trying to create a trustzone application for my board, but suddenly I could no longer flash to non-secure memory. Secure memory flashing still works fine. What am I doing incorrectly?
Thank you in advance,
Michal
the failing flash (fails even if I flash template trustzone project from CubeIDE)
PS C:\Users\test> STM32_Programmer_CLI.exe -c port=SWD mode=HotPlug -d test16.bin 0x08020000 -v
-------------------------------------------------------------------
STM32CubeProgrammer v2.22.0
-------------------------------------------------------------------
ST-LINK SN : "
ST-LINK FW : V2J47S7
Board : --
Voltage : 3.28V
SWD freq : 4000 KHz
Connect mode: Hot Plug
Reset mode : Software reset
Device ID : 0x455
Revision ID : Rev Y
Device name : STM32U535/STM32U545
NVM size : 256 KBytes
Device type : MCU
Device CPU : Cortex-M33
BL Version : --
Debug in Low Power mode enabled
-------------------------------------------------------------------
Choose flashing speed for Cortex M33 series.(default speed=Reliable)
-------------------------------------------------------------------
Opening and parsing file: test16.bin
Memory Programming ...
File : test16.bin
Size : 16.00 B
Address : 0x08020000
Erasing memory corresponding to segment 0:
Erasing internal memory sector 16
Download in Progress:
██████████████████████████████████████████████████ 100%
File download complete
Time elapsed during download operation: 00:00:00.145
Verifying...
File size < 32KB legacy verify will be used
Read progress:
██████████████████████████████████████████████████ 100%
Error: Data mismatch found at address 0x08020000 (byte = 0x00 instead of 0xEF)
Time elapsed during verifying operation: 00:00:00.034
Error: Download verification failedThis is my current Trustzone setup:
STM32_Programmer_CLI.exe -c port=SWD -ob displ
-------------------------------------------------------------------
STM32CubeProgrammer v2.22.0
-------------------------------------------------------------------
ST-LINK SN : "
ST-LINK FW : V2J47S7
Board : --
Voltage : 3.28V
SWD freq : 4000 KHz
Connect mode: Normal
Reset mode : Software reset
Device ID : 0x455
Revision ID : Rev Y
Device name : STM32U535/STM32U545
NVM size : 256 KBytes
Device type : MCU
Device CPU : Cortex-M33
BL Version : --
Debug in Low Power mode enabled
UPLOADING OPTION BYTES DATA ...
Bank : 0x00
Address : 0x50022040
Size : 32 Bytes
██████████████████████████████████████████████████ 100%
Bank : 0x01
Address : 0x50022060
Size : 8 Bytes
██████████████████████████████████████████████████ 100%
Bank : 0x02
Address : 0x50022068
Size : 8 Bytes
██████████████████████████████████████████████████ 100%
OPTION BYTES BANK: 0
Read Out Protection:
RDP : 0xAA (Level 0, no protection)
BOR Level:
BOR_LEV : 0x0 (BOR Level 0, reset level threshold is around 1.7 V)
User Configuration:
TZEN : 0x1 (Global TrustZone security enabled)
nRST_STOP : 0x1 (No reset generated when entering Stop mode)
nRST_STDBY : 0x1 (No reset generated when entering Standby mode)
nRST_SHDW : 0x1 (No reset generated when entering the Shutdown mode)
SRAM_RST : 0x1 (SRAM1, SRAM2 and SRAM4 not erased when a system reset occurs)
IWDG_SW : 0x1 (Software independent watchdog)
IWDG_STOP : 0x1 (IWDG counter active in stop mode)
IWDG_STDBY : 0x1 (IWDG counter active in standby mode)
WWDG_SW : 0x1 (Software window watchdog)
SWAP_BANK : 0x0 (Bank 1 and bank 2 address are not swapped)
DBANK : 0x1 (Dual-bank Flash with contiguous addresses)
SRAM2_RST : 0x1 (SRAM2 is not erased when a system reset occurs)
nSWBOOT0 : 0x1 (BOOT0 taken from PH3/BOOT0 pin)
nBOOT0 : 0x1 (nBOOT0 = 1)
PA15_PUPEN : 0x1 (USB power delivery dead-battery disabled/ TDI pull-up activated)
BKPRAM_ECC : 0x1 (Backup RAM ECC check disabled)
SRAM2_ECC : 0x1 (SRAM2 ECC check disabled)
IO_VDD_HSLV : 0x0 (High-speed IO at low VDD voltage feature disabled (VDD can exceed 2.5 V))
IO_VDDIO2_HSLV: 0x0 (High-speed IO at low VDDIO2 voltage feature disabled (VDDIO2 can exceed 2.5 V))
Boot Configuration:
NSBOOTADD0 : 0x100400 (0x8020000)
NSBOOTADD1 : 0x17F200 (0xBF90000)
SECBOOTADD0 : 0x180000 (0xC000000)
BOOT_LOCK : 0x0 (Boot based on the pad/option bit configuration)
Secure Area 1:
SECWM1_PSTRT : 0x0 (0x8000000)
SECWM1_PEND : 0x1F (0x803E000)
HDP1_PEND : 0x0 (0xC001FFF)
HDP1EN : 0x0 (No HDP area 1)
Write Protection 1:
WRP1A_PSTRT : 0xF (0x801E000)
WRP1A_PEND : 0x0 (0x8000000)
UNLOCK_1A : 0x1 (WRP1A start and end pages unlocked)
WRP1B_PSTRT : 0xF (0x801E000)
WRP1B_PEND : 0x0 (0x8000000)
UNLOCK_1B : 0x1 (WRP1B start and end pages unlocked)
OPTION BYTES BANK: 1
Secure Area 2:
SECWM2_PSTRT : 0x1F (0x803E000)
SECWM2_PEND : 0x0 (0x8020000)
HDP2_PEND : 0x0 (0xC101FFF)
HDP2EN : 0x0 (No HDP area 2)
OPTION BYTES BANK: 2
Write Protection 2:
WRP2A_PSTRT : 0xF (0x803E000)
WRP2A_PEND : 0x0 (0x8020000)
UNLOCK_2A : 0x1 (WRP2A start and end pages unlocked)
WRP2B_PSTRT : 0xF (0x803E000)
WRP2B_PEND : 0x0 (0x8020000)
UNLOCK_2B : 0x1 (WRP2B start and end pages unlocked)
2026-04-15 12:00 PM
Hello @shakuspyr,
Sorry for the late response.
The issue is with watermark 1 in the secure area: the end address is incorrect.
For a 256-Kbyte STM32U535/545 dual-bank device, according to RM0456 Table 51, the flash is organized as:
Your current config for secure area 1, is setting pretty much the hole flash as secure, that's why you cannot upload the none secure application.
The correct config for secure area 1 and 2 is as follows :
Secure area 1:
SECWM1_PSTRT : 0x0 (0x8000000) SECWM1_PEND : 0x0F (0x801E000)
Secure area 2:
SECWM2_PSTRT : 0x0f (0x803E000) SECWM2_PEND : 0x0 (0x08020000)
Best regards.