Dear STM Engineer,
thank You very much for Your great effort for the new STM32V8.
My comments on the features after looking into stm32v8-presentation.pdf:
- STM32V8 will have a ETH-Gb-MAC with PTP, that is great news for applications in the field of scientific instrumentation.
-- I am missing PTP-Timestamp-capture-peripherals to generate PTP-precise timestamp input-pulse captures on external events. So triggered by one GPIO input-pulse-edges (or better several logic-combined GPIOs, at least two to have one "gating), a timestamp (64 Bit or more?) should be stored, including in its timestamp-word at least two (better four or more) GPIO Input-states: state high/low AND edge falling/rising. We would need as many as possible of these PTP-Timestamp-capture-peripherals as possible, e.x. 16 or more of them per MC. Would You consider to include such PTP-Timestamp-capture-peripherals into STM32V8?
- - I am missing PTP-output-pulse-peripherals to generate PTP-precise output-pulses on per software previously selectable PTP-times. We would need several of these PTP-output-peripherals, e.x. 2..8 of them per MC. Would You consider to include such PTP-output-pulse-peripherals into STM32V8?
- I am considering to design an universal actor-sensor-xox with STM32V8 with
-- 16 slots for adapter-Cards for the hardware-flexibility and
-- Zephyr for the software-flexibility.
For this, it would be highly welcome to have a much more flexible routing of internal hardware-peripheral-IOs to GPIOs of the MC-pins. We would not need all peripherals to be routeable, e.x. SPI, I2C, I3C, UART, Timer-IOs, CAN, SAI, SPDIFRX, MDF, ADF, ADC, DAC would be sufficient. And we do not need all permutations, just the same sequence of IOs to be placed on other groups of pin-sets ("blockwise"). Would You consider to include such IO-pin-routing into STM32V8?
Up to now, we are using FPGAs. Replacing some of them by a (more) capable, flexible MC would save us development effort.
I would be delighted to receive an answer from You.
Thank You, Peter
