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STM32L4 ADC Oversampling period

KK.4
Associate II

I am planning to use STM32L4 hardware oversampling by a factor of 2.

With the current setup (without oversampling), I am triggering ADC capture and conversion using Timer update event. The timer update event is generated at 10kHz and so the ADC is sampling at 10kHz. I am using DMA transfer from the ADC to fill buffer array of 1024 length and call ADC conversion complete interrupt.

Now, with a oversampling period of 2, what will be the total sampling period to capture 1024 data points?

Ex. With current setup, total time to capture 1024 samples = (1/10 kHz) x 1024 = 102.4 ms.

With the oversampling hardware configured (Factor 2) with the same timer trigger of 10kHz , will the total time to capture 1024 samples increase by a factor of 2? i.e 204.8ms?

5 REPLIES 5
AScha.3
Chief II

look in rm , chapter ADC : here from H743 ->

0693W00000aImWyQAK.png 

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Thanks for the reference.

0693W00000aImleQAC.pngFrom the above definition, if I set my ADC clock and ADC sampling time, can I control the sampling time in oversampling?

Ex. ADC input clock input = 26 Mhz and prescaler setting of 10, the effective ADC clock would become 2.6MHz.

ADC sampling time = 247.5 cycles with 12.5 cycles for 12 bit conversion

Oversampling ratio of 2x

T Conv = ( 247.5 + 12.5 ) x (1 / 2.6 MHz) = 100 us which is 10kHz.

New delay between each data in buffer with 2x oversampling = 2 x 100 us = 200us which is 5kHz.

AScha.3
Chief II

yes. basic timing stay same. only data is average of 2 or more sampels, with better resolution (should have...).

(as i understand it...) exept you use a mode to trigger every conversion:

0693W00000aInWGQA0.pngbut if you make sampling time very long - yes, then you could control sampel rate this way.

just - more "usual" way would be : set sampling rate by a timer, triggers ADC. then with short adc-sampling-time you get always same clear defined sample frequency, just more resolution with oversampling. (observe time needed for all the sampels when ov .)

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I am not doing oversampling to increase the resolution but just to increase the total time for DMA to fill a fixed buffer of 1024 array.

Even though the ADC samples with the same time, the effect of averaging will act as low pass filter and increase the total time for the DMA to fill the same 1024 point fixed buffer right?

right.

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