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STM32H7R7: How to setup memory mapped XSPI for external HyperRAM S70KL1282?

dhAvionics
Associate

Hi,

we are using the STM32H7R7I8T6 MCU with an Infineon S70KL1282 HyperRAM Chip attached on XSPI1 and configured via CubeMX, we are looking for an example for the correct timing/parameters to use the RAM Chip in memory mapped mode as Graphics RAM.

Our current config makes makes reading and writing possible but the memory contains garbarge data.

We are repeatedly trying to write the string "1234567890" into the external RAM but we get back the following:

dhAvionics_0-1770577993547.png

The current config is built from various other examples we could find like this one: https://github.com/STMicroelectronics/STM32CubeH7/blob/master/Projects/STM32H735G-DK/Examples/OSPI/OSPI_HyperRAM_MemoryMapped/Src/main.c but the parameters do not match exactly.

 

Our current code looks like this:

/**
  * @brief XSPI1 Initialization Function
  * @PAram None
  * @retval None
  */
static void MX_XSPI1_Init(void)
{

  /* USER CODE BEGIN XSPI1_Init 0 */

  /* USER CODE END XSPI1_Init 0 */

  XSPIM_CfgTypeDef sXspiManagerCfg = {0};
  XSPI_HyperbusCfgTypeDef sHyperBusCfg = {0};

  /* USER CODE BEGIN XSPI1_Init 1 */
  hxspi1.Instance = XSPI1;
  HAL_XSPI_DeInit(&hxspi1);

  /* USER CODE END XSPI1_Init 1 */
  /* XSPI1 parameter configuration*/
  hxspi1.Instance = XSPI1;
  hxspi1.Init.FifoThresholdByte = 4;
  hxspi1.Init.MemoryMode = HAL_XSPI_SINGLE_MEM;
  hxspi1.Init.MemoryType = HAL_XSPI_MEMTYPE_HYPERBUS;
  hxspi1.Init.MemorySize = HAL_XSPI_SIZE_128MB;
  hxspi1.Init.ChipSelectHighTimeCycle = 8;
  hxspi1.Init.FreeRunningClock = HAL_XSPI_FREERUNCLK_DISABLE;
  hxspi1.Init.ClockMode = HAL_XSPI_CLOCK_MODE_0;
  hxspi1.Init.WrapSize = HAL_XSPI_WRAP_NOT_SUPPORTED;
  hxspi1.Init.ClockPrescaler = 8;
  hxspi1.Init.SampleShifting = HAL_XSPI_SAMPLE_SHIFT_NONE;
  hxspi1.Init.ChipSelectBoundary = HAL_XSPI_BONDARYOF_64MB;
  hxspi1.Init.MaxTran = 0;
  hxspi1.Init.Refresh = 250;
  hxspi1.Init.MemorySelect = HAL_XSPI_CSSEL_NCS1;
  if (HAL_XSPI_Init(&hxspi1) != HAL_OK)
  {
    Error_Handler();
  }
  sXspiManagerCfg.nCSOverride = HAL_XSPI_CSSEL_OVR_NCS1;
  sXspiManagerCfg.IOPort = HAL_XSPIM_IOPORT_1;
  sXspiManagerCfg.Req2AckTime = 1;
  if (HAL_XSPIM_Config(&hxspi1, &sXspiManagerCfg, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
  {
    Error_Handler();
  }
  sHyperBusCfg.RWRecoveryTimeCycle = 7;
  sHyperBusCfg.AccessTimeCycle = 4;
  sHyperBusCfg.WriteZeroLatency = HAL_XSPI_LATENCY_ON_WRITE;
  sHyperBusCfg.LatencyMode = HAL_XSPI_FIXED_LATENCY;
  if (HAL_XSPI_HyperbusCfg(&hxspi1, &sHyperBusCfg, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
  {
    Error_Handler();
  }
  /* USER CODE BEGIN XSPI1_Init 2 */

  /* USER CODE END XSPI1_Init 2 */

}
/* USER CODE BEGIN 4 */
/* This function enables memory-mapped mode for Read and Write operations */
void EnableMemMapped(void)
{
  XSPI_HyperbusCmdTypeDef sCommand;
  sCommand.AddressSpace = HAL_XSPI_MEMORY_ADDRESS_SPACE;
  sCommand.AddressWidth = HAL_XSPI_ADDRESS_32_BITS;
  sCommand.DQSMode = HAL_XSPI_DQS_ENABLE;
  sCommand.Address = 0;
  sCommand.DataLength = 1;
  if(HAL_XSPI_HyperbusCmd(&hxspi1, &sCommand, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
  {
    Error_Handler();
  }

  XSPI_MemoryMappedTypeDef sMemMappedCfg;
  sMemMappedCfg.TimeOutActivation = HAL_XSPI_TIMEOUT_COUNTER_DISABLE;
  if(HAL_XSPI_MemoryMapped(&hxspi1, &sMemMappedCfg) != HAL_OK)
  {
    Error_Handler();
  }

  uint32_t address = 0;
  uint16_t index1;/*index1 counter of bytes used when reading/
  writing 256 bytes buffer */
  uint16_t index2;/*index2 counter of 256 bytes buffer used when reading/
  writing the 1Mbytes extended buffer */

  mem_addr = (__IO uint8_t *)(XSPI1_BASE + address);
  /*Writing 1Mbyte (256Byte BUFFERSIZE x 4096 times) */
  for (index2 = 0; index2 < 4096; index2++)
  {
    for (index1 = 0; index1 < BUFFERSIZE; index1++)
    {
      *mem_addr = aTxBuffer[index1];
      mem_addr++;
      // HAL_GPIO_TogglePin(GPION, GPIO_PIN_4);
      HAL_Delay(1); /* add delay to better see the toggling on the led when writing the PSRAM */
    }
  }
  /*----------------------------------------------------------------------*/
  /* Reading Sequence of 1Mbyte */
  mem_addr = (__IO uint8_t *)(XSPI1_BASE + address);
  /*Reading 1Mbyte (256Byte BUFFERSIZE x 4096 times)*/
  for (index2 = 0; index2 < 4096; index2++) {
    for (index1 = 0; index1 < BUFFERSIZE; index1++)
    {
      if (*mem_addr != aTxBuffer[index1])
      {
        HAL_GPIO_TogglePin(GPION, GPIO_PIN_4);
        /*if data read is corrupted we can toggle a led here: example blue led*/
      }
      //HAL_GPIO_TogglePin(GPION, GPIO_PIN_4);
      //HAL_Delay(1);
      mem_addr++;
    }
  }
  mem_addr = (__IO uint8_t *)(XSPI1_BASE + address);
  HAL_GPIO_WritePin(GPION, GPIO_PIN_4, GPIO_PIN_RESET);
}
/*----------------------------------------------------------------------*/
/*This function is used to calibrate the Delayblock before initiating
USER's application read/write transactions*/
/* USER CODE END 4 */

 

Any help is very appreciated.

1 ACCEPTED SOLUTION

Accepted Solutions
KDJEM.1
ST Employee

Hello @dhAvionics,

 

You can find more details about the XSPI settings description in AN5050 Table 8.  STM32CubeMX - Configuration of OCTOSPI parameters.

KDJEM1_0-1770801997213.png

Could you please try to decrease the XSPI frequency. Is the issue solved?

 

Thank you.

Kaouthar

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

View solution in original post

3 REPLIES 3
KDJEM.1
ST Employee

Hello @dhAvionics ;

 

Could you please check RW recovery time and Access time.

 Read/write recovery time (TRWR) define the device read/write recovery time, expressed in number of OCTOSPI clock cycle, configured depending on the memory datasheet.
Access time (TACC) is expressed in number of OCTOSPI clock cycles, configured depending on the memory datasheet.

 

Thank you.

Kaouthar

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

dhAvionics
Associate

Thank you very much @KDJEM.1;

 

We tried the values from the datasheet (35ns @ 200MHz = 7 Cycles for both)

dhAvionics_1-1770656854310.png

In the datasheet we found the following default values for the timing:

Initial latency: 7 Clock latency @ 200 MHz/166 MHz max frequency

Fixed latency enable: 1 - Fixed 2 times initial latency

Hybrid burst enable: 1: Wrapped burst sequence in legacy wrapped burst manner

Burst length: 32 bytes

 

We ended up with the following config but it still produces garbarge Data and sometimes hangs the chip:

 

dhAvionics_2-1770656933032.png

it is unclear for us which values corrospond the the items in the list.

For example: what ist "Refresh Rate", "Maximum transfer", ...?

Is there an example maybe?

Again, thank you for your help.

KDJEM.1
ST Employee

Hello @dhAvionics,

 

You can find more details about the XSPI settings description in AN5050 Table 8.  STM32CubeMX - Configuration of OCTOSPI parameters.

KDJEM1_0-1770801997213.png

Could you please try to decrease the XSPI frequency. Is the issue solved?

 

Thank you.

Kaouthar

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.