STM32F429 NAND conflict withSDRAM

[zeus_zhn]

Posted on October 21, 2014 at 09:55

I have a board based on the stm32f429. There is a 16M Bytes SDRAM (MT48LC16M8) and a 32M bytes NAND (NAND128W3A2B) connected to the FMC bus.

I used one area of the SDRAM as the LTCD buffer,such as:  /* Start Address configuration : the LCD Frame buffer is defined on SDRAM */     LTDC_Layer_InitStruct.LTDC_CFBStartAdress = LCD_FRAME_BUFFER; There is two strange problem: [1] The nand write/read is always unstable, sometimes went wrong. After months of trying, I finally found that: The nand operation is ok if I turn off the LTDC controller, namely not using the SDRAM as frame buffer. the command is:  LTDC_Cmd(ENABLE); [2] Even I turn off the LTDC controller, if I use the upper 8M bytes of sdram, the nand still generates write error. To summarize: The only working nand operation is to satisfy both: a. Turn off the LCD controller; b. configure the SDRAM as using 8M bytes only:   FMC_SDRAMInitStructure.FMC_ColumnBitsNumber = FMC_ColumnBits_Number_9b;   FMC_SDRAMInitStructure.FMC_RowBitsNumber = FMC_RowBits_Number_12b; If I configure to use the whole 16M SDRAM like:   FMC_SDRAMInitStructure.FMC_ColumnBitsNumber = FMC_ColumnBits_Number_10b;   FMC_SDRAMInitStructure.FMC_RowBitsNumber = FMC_RowBits_Number_12b; nand will go wrong. I have researching this problem for months, can't find the answer, could anyone help me out. Even a hint maybe will help me find the solution. Thank you very much! If I only use the

[Tesla DeLorean]

Posted on November 18, 2014 at 17:46

So the only solution for me is to wait the version 3 chip?

This is a conversation you should be having with your local ST representatives and FAEs. They are much better placed to understand the problem, and any solutions, or timing of chip releases.