STM32F411RE and nrf24l01 module compatability issues

[RM.7]

Sir I am doing my final year project and got struck. My project aim is to receive data from the nrf24l01 module which connected with arduino for generating sinewaves this act as TX part. Now in RX part I am using nrf24l01 with STM32f411re and I want to receive data in live from TX ,will process the signal and display the output. The serial plotter is not showing the signal. Here are the codes of my main.c,nrf24l01.c,nrf24l01.h codes.

nrf24l01.c:

#include "nrf24l041.h"

void SPI_Init(void) {

  RCC->APB2ENR |= RCC_APB2ENR_SPI1EN; // Enable SPI1 clock

  // Configure SPI1 pins (GPIOA pins for this example)

  GPIOA->MODER |= GPIO_MODER_MODER5_1 | GPIO_MODER_MODER6_1 | GPIO_MODER_MODER7_1; // Set alternate function mode for SPI pins

  GPIOA->AFR[0] |= (5 << GPIO_AFRL_AFSEL5_Pos) | (5 << GPIO_AFRL_AFSEL6_Pos) | (5 << GPIO_AFRL_AFSEL7_Pos); // Set alternate function as SPI

  SPI1->CR1 = SPI_CR1_BR_1 | SPI_CR1_BR_0; // Set baud rate (fPCLK/16)

  SPI1->CR1 |= SPI_CR1_CPOL | SPI_CR1_CPHA; // Set clock polarity and phase (CPOL = 1, CPHA = 1)

  SPI1->CR1 |= SPI_CR1_MSTR; // Set SPI mode as master

  SPI1->CR1 |= SPI_CR1_SPE; // Enable SPI

}

uint8_t SPI_Transfer(uint8_t data) {

  while (!(SPI1->SR & SPI_SR_TXE)); // Wait until transmit buffer is empty

  *((__IO uint8_t *)&SPI1->DR) = data; // Send data

  while (!(SPI1->SR & SPI_SR_RXNE)); // Wait until receive buffer is full

  return *((__IO uint8_t *)&SPI1->DR); // Return received data

}

void NRF24_Init(void) {

  // Configure NRF24L041 pins

  GPIOB->MODER |= GPIO_MODER_MODER12_0; // Set CE pin as output mode

  GPIOB->MODER |= GPIO_MODER_MODER6_0; // Set CSN pin as output mode

  GPIOB->MODER &= ~(GPIO_MODER_MODER15); // Set IRQ pin as input mode

  // Enable NRF24L041 module

  NRF24_CE_LOW; // Set CE pin low to disable module

  NRF24_CSN_HIGH; // Set CSN pin high

  // Initialize SPI communication

  SPI_Init();

  // Configure NRF24L041 module

  NRF24_WriteRegister(NRF24_REG_CONFIG, 0x08); // Disable CRC, 1 byte CRC length, RX mode

  // Set address width to 5 bytes

  NRF24_WriteRegister(NRF24_REG_SETUP_AW, 0x03);

  // Set RX pipe 0 address (5 bytes)

  uint8_t address[] = {0x12, 0x34, 0x56, 0x78, 0x90};

  NRF24_WriteRegisterMulti(NRF24_REG_RX_ADDR_P0, address, 5);

  NRF24_WriteRegister(NRF24_REG_RX_PW_P0, 0x01); // Set payload width to 1 byte for RX pipe 0

  NRF24_CE_LOW; // Set CE pin low to disable module

}

void NRF24_WriteRegister(uint8_t reg, uint8_t value) {

  NRF24_CSN_LOW; // Set CSN pin low

  SPI_Transfer(NRF24_CMD_W_REGISTER | reg); // Send register address with write command

  SPI_Transfer(value); // Send value

  NRF24_CSN_HIGH; // Set CSN pin high

}

void NRF24_WriteRegisterMulti(uint8_t reg, uint8_t *data, uint8_t length) {

  NRF24_CSN_LOW; // Set CSN pin low

  SPI_Transfer(NRF24_CMD_W_REGISTER | reg); // Send register address with write command

  for (uint8_t i = 0; i < length; i++) {

    SPI_Transfer(data[i]); // Send data

  }

  NRF24_CSN_HIGH; // Set CSN pin high

}

uint8_t NRF24_ReadRegister(uint8_t reg) {

  NRF24_CSN_LOW; // Set CSN pin low

  SPI_Transfer(NRF24_CMD_R_REGISTER | reg); // Send register address with read command

  uint8_t value = SPI_Transfer(0x00); // Send dummy byte to receive value

  NRF24_CSN_HIGH; // Set CSN pin high

  return value;

}

void NRF24_ReceiveData(uint8_t *data, uint8_t length) {

  NRF24_CE_HIGH; // Set CE pin high to enable RX mode

  while (NRF24_IRQ_STATE); // Wait until data is ready

  NRF24_CE_LOW; // Set CE pin low

  NRF24_CSN_LOW; // Set CSN pin low

  SPI_Transfer(NRF24_CMD_R_RX_PAYLOAD); // Send command to read received payload

  for (uint8_t i = 0; i < length; i++) {

    data[i] = SPI_Transfer(0x00); // Receive data

  }

  NRF24_CSN_HIGH; // Set CSN pin high

  NRF24_WriteRegister(NRF24_REG_STATUS, NRF24_STATUS_RX_DR); // Clear RX_DR interrupt flag

}

nrf24l01.h:

#ifndef NRF24L041_H

#define NRF24L041_H

#include "stm32f4xx.h"

// Pin Definitions

#define NRF24_CE_HIGH  GPIOB->BSRR |= GPIO_BSRR_BS_12

#define NRF24_CE_LOW  GPIOB->BSRR |= GPIO_BSRR_BR_12

#define NRF24_CSN_HIGH GPIOB->BSRR |= GPIO_BSRR_BS_6

#define NRF24_CSN_LOW  GPIOB->BSRR |= GPIO_BSRR_BR_6

#define NRF24_IRQ_STATE (GPIOB->IDR & GPIO_IDR_IDR_15)

// Register Definitions

#define NRF24_REG_CONFIG    0x00

#define NRF24_REG_SETUP_AW   0x03

#define NRF24_REG_RX_ADDR_P0  0x0A

#define NRF24_REG_RX_PW_P0   0x11

#define NRF24_REG_STATUS    0x07

// Command Definitions

#define NRF24_CMD_R_REGISTER  0x00

#define NRF24_CMD_W_REGISTER  0x20

#define NRF24_CMD_R_RX_PAYLOAD 0x61

// Status Register Bit Definitions

#define NRF24_STATUS_RX_DR   0x40

// Function Prototypes

void SPI_Init(void);

uint8_t SPI_Transfer(uint8_t data);

void NRF24_Init(void);

void NRF24_WriteRegister(uint8_t reg, uint8_t value);

void NRF24_WriteRegisterMulti(uint8_t reg, uint8_t *data, uint8_t length);

uint8_t NRF24_ReadRegister(uint8_t reg);

void NRF24_ReceiveData(uint8_t *data, uint8_t length);

#endif /* NRF24L041_H */

please reply fast and resolve the problem.Thank you.

[Brian TIDAL]

Hi,

make sure to follow the ground rules of this community and to not post direct message. If you have issues with nrf24l01, make sure to contact the manufacturer of this device.

Rgds

BT