STM32F303RE - Basic Timer Only Works as Expected in Debug?

[Mark Tuma]

Hi,

I have a confusing issue with the basic timer (TIM6) on the F303RE. The code below works fine if I single step through in debug mode, but when I allow it to free-run it appears as though the timer is never enabled (CEN bit is not set), and so the SR bit is never set because the timer never completes.

I can't see anything in this code, or in the HAL implementation, that would explain this, but I'm new to STM32 and Cube, so it's entirely possible I am doing something stupid. Can anyone explain what's going on here and how to correct it?

Thanks,

Mark

switch (controller->state) {
        case SSD1306_INIT_TIMER:
            controller->buffer = SSD1306_Buffer;
            //do baseline stuff - configure timer for reset pin, set the controller to in use, etc.
            controller->inUse = true;
            controller->task = INITIALIZE;
            //Set reset low
            SSD1306_CommandMode();
            //Check for a valid timer
            if (controller->TIM_Handle != 0) {
                //Set timer alarm for 5 us - 3 is minimum required for reset
            	CLEAR_BIT (controller->TIM_Handle->Instance->SR, TIM_SR_UIF);
            	frequency = HAL_RCC_GetPCLK1Freq (); //get current timer input frequency
            	controller->TIM_Handle->Instance->ARR = (uint16_t) (0.005 / 1000 * frequency / (controller->TIM_Handle->Instance->PSC +1));
            	controller->TIM_Handle->Instance->CR1 |= TIM_CR1_OPM; //Set for one shot
				SET_BIT (controller->TIM_Handle->Instance->EGR, TIM_EGR_UG);
				while (!READ_BIT (controller->TIM_Handle->Instance->SR, TIM_SR_UIF)) {
 
				}
				CLEAR_BIT (controller->TIM_Handle->Instance->SR, TIM_SR_UIF);
				while (READ_BIT (controller->TIM_Handle->Instance->SR, TIM_SR_UIF)) {
								}
				__NOP();
            	HAL_TIM_Base_Start (controller->TIM_Handle);
            	controller->state = SSD1306_INIT_RESET;
			}
            break;
        case SSD1306_INIT_RESET:
            //Check if alarm has completed by testing flag
 
        	if ((controller->TIM_Handle->Instance->SR & TIM_SR_UIF) {
                    HAL_TIM_Base_Stop (controller->TIM_Handle);