STM32F103VC: gpio protection diodes not working?

[amarchi]

Posted on February 11, 2015 at 17:29

Hi everybody,

I have a GPIO configured as input pull up. The input conditioning circuit is really simple, it is just an external pull up wich is connected to ground when external event occurs.See attachment for schematic of input circuit.I want to check if the gpio protection diodes work (the gpio is 5 V tolerant), so by means of a power supply I apply to point A an increasing voltage (current limited to 10 mA) starting from ground. I then monitor the voltage in point B. What I expect is that as voltage applied to A increases the voltage on B increases as well, but it should clamp at some point (around 5 V) regardless the voltage applied to A.But, this is not the case, if I apply 8 V to A, I read about 8 B also on B.So, am I missing something? From the STM32F103 reference manual (section 9.1) it seems that the protection diodes are placed soon after the gpio pin so the clamp of protection diodes should be observable  in B.Thank you for your help!

[Tesla DeLorean]

Posted on February 11, 2015 at 18:00

So, am I missing something?

That it's floating the FT IO rail higher? If you want it to clamp to 5V specifically, you're going to have to provide the 5V and DIODES to do that.

[amarchi]

Posted on February 11, 2015 at 19:07

Thank you very much,

but, can this happen only because the pin is 5 V tolerant? I mean, as far as I have understood (but I am not sure I have understood well...) the VDD_FT is generated internally starting from VDD, am I right? So for this reason it can be possible to ''float'' it to higher values, right?What would happen if I use a non 5 V tolerant pin? Should voltage in B be clamped to 3.3 V ? Or also in this case, by applying higher voltages, I would observe higher voltages in B?Thank you again! 

[Tesla DeLorean]

Posted on February 11, 2015 at 19:35

The non-FT pins are connected more directly with the VDD (~3V) rail, when you put a higher voltage on IO pins you end up back driving the device and all the voltages in the part go up. This is why you're told not to exceed VDD by whatever margin the diode affords.

On the FT side, I would expect it's going to reach whatever the highest supply is on the pins. It's says it's five volt tolerant, not eight volt. You'd need to enforce the 5V limit externally with your own diodes and supply.

[amarchi]

Posted on February 11, 2015 at 23:05

Thank you again!

actually, my investigation on the effectiveness of gpio protection diodes has originated from another, actually still unexplained, problem, that I have described in a new post''[DEAD LINK /public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/STM32F103%20noise%20on%20GPIO%20input%20signal%20causes%20weird%20behaviour&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B]STM32F103: noise on GPIO input signal causes weird behaviour''briefly: the input gpio for which I have checked the behaviour of protection diodes is subject, due to external components, to some noise. Sometimes the input signal (which is pulled up by the external input circuit) is subject to noise which lasts about 20 us.Sometimes it happens that this noise is latched by the gpio (maybe its internal schmitt trigger??) for about 500 ms... I have no idea where to focus on to find an explanation....thank you for your attention!