STM32F0-Discovery SPI2 setup and operation.

jason23 · ‎2013-12-05

Posted on December 05, 2013 at 15:02

I have an application that requires both of the SPI interfaces running as masters. The code currently has SPI1 up and running. I have then copied the setup function calls and updated them to configure SPI2 (taking into account that I have to use APB1 to enable the peripheral)

All compiles and links ok and I can then enter de-bug. The function that starts the send loads the transmit buffer for SPI1 and then SPI2. The next 4 lines of code monitor the TXE flag and BSY flag for both SPI1 and SPI2. On execution both buffers are loaded, TXE flag for SPI1 goes TRUE but then the TXE flag for SPI2 stays FALSE.

On the logic analyser I see that SPI1 has transmitted ok but there is no output from SPI2.

Is the configuration of SPI2 different to SPI1? Do the TXE flags operate differently?

Also I have noticed that the BSY flag is never TRUE for either SPI1 or 2. When does it go TRUE?

Thanks for any help

Jason

jason23 · ‎2013-12-05

Posted on December 05, 2013 at 15:41

The original post was too long to process during our migration. Please click on the provided URL to read the original post. https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I6gn&d=%2Fa%2F0X0000000btH%2F682eHpUfAThka6I5kXvLy.V6gDp.gKlVzvwkzGEpQ4M&asPdf=false

Tesla DeLorean · ‎2013-12-05

Posted on December 06, 2013 at 02:26

You really should front test TXE, it should reassert as soon as the first bit shifts out. It is the flag for the holding register, not the shift register.

I'm not sure SPI1 and SPI2 should behave any differently, the AF settings appear correct.

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jason23 · ‎2013-12-06

Posted on December 06, 2013 at 11:36

Hi Clive,

So further into the rabbit hole we go.

I am now looking at the RCC registers using the watch window. APB2ENR sets and resets for SPI1 without any issue. APB1ENR is all in reset and SPI2 will not set. I also tried setting USART2 with no joy.

The setting and resetting is carried out by function RCC_APBxPeriphResetCMD(), where x is 1 or 2. Both functions are identical and when I single step through the code they both execute in the same way. The only difference is that the APB1ENR register will not set any of the peripherals. The device on the discovery board is an STM32F051R8T6. Looking on the ST.com site this device does support two SPI's.

Do I need to enable something else in order to use the APB1ENR register?

jason23 · ‎2013-12-06

Posted on December 06, 2013 at 12:55

Success. I have found the issue. Below are two snippets of code. The first is the opening lines for initialising SPI1 the second are the same lines for SPI2. On closer examination I have spotted that I have ENABLED SPI2 reset not the clock.

void NTD_Spi1_init(void)

{

/* GPIOA Periph clock enable */

RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);

/* SPI1 Periph clock enable */

RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);

void NTD_Spi2_init(void)

{

/* GPIOA Periph clock enable */

RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);

/* SPI2 Periph clock enable */

RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);

For a short time I thought I had found an issue with the core code from ST. But all is well and we have not had to challenge the laws of physics or the fundamentals of what is right in nature. It is a plain old ''I got my cut and paste wrong!'' I shall now go spend some time standing in the corner and contemplate why the universe tolerates me.

Thanks for all the help Clive.

Jason