STM32 32-bit ARM Cortex MCUs(SPI transaction misbehavior)

[rakesh GMN]

Posted on June 21, 2018 at 13:55

STM32F427 SPI controller path bring up. I want to bring up SPI read write transaction, as I am performing SPI transaction for the first time on power on the transaction looks perfectly okay(Checking the timing waveforms of SCLK, and MOSI  pins at the receiver end).

                    But, as we do the next SPI transactions, observing irregular behavior with respect to number of SPI clocks driven by the master SPI controller in STM32. And also the data out from MOSI is not as expected. Please do the needful. 

[David Littell]

Posted on June 28, 2018 at 15:49

SPI signals are connected between a microcontroller and an FPGA on our custom board. We cannot isolate the SPI signals.

Haha.  So the SPI-to-FPGA signals are on an inner layer with no inline termination resistors?  Otherwise, that's just BS.

The STM32 code is generated from STMCube tool. FPGA code has been simulated with a test bench and the code works fine.

OK, so everything works fine.  Glad to hear it.  If not, stop wasting our time and post some code that demonstrates the claimed behavior.

[Tesla DeLorean]

Posted on June 28, 2018 at 16:06

I don't think simulation has survived the first incursion with reality.