Posted on May 17, 2011 at 12:47_addr/line__|code_____|label_________________________|mnemonic________________|comment
SR:105436BC|030052E3 __rt_memcpy: cmp r2,#0x3
SR:105436C0|922AF49A bls 0x1024E110 ; _memcpy_lastbytes
_SR:105436C4|03C010E2_________________________________ands____r12,r0,#0x3
SR:105436C8|0800000A beq 0x105436F0 ; _memcpy_dest_aligned <-- determine if r0 (dest) is 4 byte aligned. In this case yes.
SR:105436CC|0130D1E4 ldrb r3,[r1],#0x1
SR:105436D0|02005CE3 cmp r12,#0x2
SR:105436D4|0C2082E0 add r2,r2,r12
SR:105436D8|01C0D194 ldrlsb r12,[r1],#0x1
SR:105436DC|0130C0E4 strb r3,[r0],#0x1
SR:105436E0|0130D134 ldrccb r3,[r1],#0x1
SR:105436E4|01C0C094 strlsb r12,[r0],#0x1
SR:105436E8|042042E2 sub r2,r2,#0x4
SR:105436EC|0130C034 strccb r3,[r0],#0x1
SR:105436F0|033011E2 _memcpy_dest_aligned: ands r3,r1,#0x3
SR:105436F4|722AF40A beq 0x1024E0C4 ; __rt_memcpy_w <-- if r1 (src) also is 4 byte aligned then do word copy
SR:105436F8|082052E2 _memcpy_src_nonaligned: subs r2,r2,#0x8
SR:105436FC|0400003A bcc 0x10543714 ; _memcpy_src_nonaligned_end <-- check r2 (end of src which is size) is aligned.
SR:10543700|043091E4_________________________________ldr_____r3,[r1],#0x4 <--- perform 4-byte aligned read since B-bit (bit 22) is 0 in the opcode
SR:10543704|04C091E4 ldr r12,[r1],#0x4
SR:10543708|043080E4 str r3,[r0],#0x4
SR:1054370C|04C080E4 str r12,[r0],#0x4
It performed 4-byle aligned read even after determining that the source is not 4-byte aligned. Hmmmm…
The problem I see here is that instruction opcode indicates it is word aligned read but the operand r1 is not word aligned. It is causing alignment fault and it should but I am trying to understand if there is a bug here in the __rt_memcpy code since it already verified that r1 is not word-aligned.
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( extract from arm forum).
The cortex-m3 support unaligned access when using ldr or str,so if the r1 is not word aligned,ldr should work well.
it's puzzling me.Doesn't cortex-m3 support unaligned accesss?(we are using mdk.)
Does this make sense?
