2008-06-09 03:43 AM
Protection, Is my code in Flash really secure?
#stm322014-03-12 05:03 AM
Wow this is an ancient thread from 2008, the 2011 date is when the forum melted down and all responses are tagged with that date.
So lets put some things in context, this mainly deals with the F1 parts, the F2/F4 parts have a fuse to lock JTAG access. The system loader on F1, and others, does check the RDP/ROP settings and disables a subset of commands, including read commands. The F2, F4, etc also do similar things, although I have reviewed them less thoroughly. They should be reasonably secure, but have some specific vulnerabilities. You can't remove/change the system loader which starts when BOOT0=High. On the F1 it's possible to boot into RAM, and use JTAG to download into RAM regardless of the RDP state. Even if you replaced the system loader, or some how came up with some magic loader that you thought was more robust, it would still be vulnerable to several vectors of attack, especially the physical ones. ST once stated it would take >$1M of equipment, but I would suggest you only need access and expertise of such equipment, try any university campus, or any IC QA lab.2014-08-28 11:54 AM
Clive, you wrote:
You can't remove/change the system loader whichstarts when BOOT0=High. On the F1 it's possible to boot into RAM, anduse JTAG to download into RAM regardless of the RDP state.
From the reference manual for the STM32L0x RDP level 1 means,
No access to the Flash program memory and data EEPROM (read both for fetch and data and write) and no backup register reading is performed if the debug features (single-wire), or the device boot in the RAM, or the System memory is connected. If the user tries to read the Flash memory or data EEPROM, a bus error is generated. No restriction is present on other areas: it is possible to read and write/erase the Option bytes area and to execute or read in the System Memory.
Evenif you replaced the system loader, or some how came up with some magicloader that you thought was more robust, it would still be vulnerable toseveral vectors of attack, especially the physical ones. ST once statedit would take >$1M of equipment, but I would suggest you only needaccess and expertise of such equipment, try any university campus, orany IC QA lab.
RDP level 2 eliminates access to the system memory and SWI,
Level 2 is set when RDPROT is set to 0xCC. When this level is enabled, it is only possible to boot from the Flash program memory, and the debug features (single-wire) are disabled. The Option bytes are protected against write/erase and the protection level can no longer be changed. The application can write/erase to the Flash program memory and data EEPROM (it is only possible to boot from the Flash program memory and execute the customer code) and access the backup registers. When an Option bytes loading is executed and Level 2 is enabled, old information on debug or boot in the RAM or System memory are deleted.
2014-08-28 12:54 PM
I haven't had any cause to review the L0 parts. The question really is from whom do you hope to protect your IP, and what equipment and skills do they bring to the party. Disabling JTAG closes a lot of doors, user code tends to open others. The memory is not encrypted and the hardware protection is afforded by less than a dozen gates.