I have a project to use the STM32L496 to sample an analog pulse for processing.
The sceraio as followes:
Input guassain pulse will be fed to postive comparator input, the negative terminal will be set by the DAC. Once the signal above the DAC threshold, it should start a sampling timer for an adjustable total sample time (i.e. 10 uSec) based on pulse width. The samping time will be around 1 uSec. I will be driving this uC to maximum speed of 72 Mhz.
I would like to know the total system delay from when the signal is above threshold until the ADC start sampling?
Comparator propogation delay (??) ns ( i think it is about 80 ns)
Comparator to the start the timer (??)
Timer to start the ADC (??)
I could not easily find the information from data sheet and I do appreciate if you could help.
Another question, it is possible to directly trigger the ADC to start sampling a known number of samples, I think NO, but would like to confirm
Thanks
