Parallel synchronous transmission using GPIO and DMA. Which chip to use to receive data under 20MHz?

[#1]

I found the doc AN4666 and AN2548, but I could not come to a conclusion.

I have the STM32F103C8T6, but when performing a sequence of 1000 readings, the average time was of 266us, approximately 3.759398 MHz.

I would like to know which chip model should I use to be able to receive data from the external ADC at a frequency of 20 MHz and 8 bits (TLC5510), with external clock, managed by external interrupt (ADC clock)?

Thank you.

[Tesla DeLorean]

Wouldn't an FSMC implementation work faster? DCMI has better speed.

Or a FIFO buffer http://www.averlogic.com/AL422B.asp capture at high rates, pull as fast as possible

What do you plan to do with the data?

[#3]

Hi, FIFO is a good idea, I was thinking of using some buffer made with parallel SDRAM, but the FIFO is already done. Thank you!

But, I would like to know how to get 200MSPS from a 40MSPS ADC. Using only one STM32F407VET6 and one adc AD9288BSTZ-40. Look at this analysis of this DSO338:

https://lygte-info.dk/review/Equipment% ... %20UK.html

[#4]

I found something about this in this post, I'll try to find some sample code to test:

https://community.st.com/s/question/0D50X00009XkY0USAV/gpio-to-sram-using-dma-is-it-possible-in-stm32

[S.Ma]

That's a nice non cheap chip. Could be interesting to have HW FIFO logic with SRAM in STM32?

[#6]

I found the AN5020 (Digital camera interface (DCMI) for STM32 MCUs) but seems that DCMI is only for:

STM32F2x7

STM32F407/417

STM32F427/437

STM32F429/439

STM32F446

STM32F469/479

STM32F7x5

STM32F7x6

STM32F7x7

STM32F7x8

STM32F7x9

STM32L4x6

STM32H7x3

And I found the AN3241 (QVGA TFT-LCD direct driveusing the STM32F10xx FSMC peripheral)

[Tesla DeLorean]

They presumably over-clock the part, and interleave the two ADC

https://www.analog.com/media/en/technical-documentation/data-sheets/AD9288.pdf

[#8]

Hummm...

Overclock 40MSPS to 100MSPS?

It does not make much sense for the manufacturer to make a 100MSPS version if the 40MSPS version can reach 100MSPS.

If it was the 100MSPS version, using the interleaved channels, maybe, sounds good.

The best way to check this would be to measure the ADC clock?

I find it interesting, the STM32F407VET6 can generate a clock of 100MHz?

[S.Ma]

And how will you process the incoming data if the data rate is higher than the max SYSCLK?

[#10]

I found this video on the use of interleaved ADCs, it is very interesting what manufacturers may be doing:

What? 5x AD9288-40 (40MSPS) to get 1GSPS???????

[EEVblog #19 - Rigol caught with their pants down!]

https://www.youtube.com/watch?v=G6WH7kW-NVg