2026-02-20 5:41 AM
I am working with the STM32U083RCT6 and I need clarification regarding the exact physical memory addresses of the option bytes.
In the reference manual, I can see that the option bytes are located in the system memory area:0x1FFF7000 – 0x1FFF7FFF
However, the manual only describes the FLASH option registers (OPTR, PCROP1SR, PCROP1ER, WRP1AR, WRP1BR) with register offsets from the FLASH peripheral base address. It does not clearly mention the exact non-volatile storage addresses inside system memory.
I would like to confirm:
1.What is the officially documented physical start address of the option byte storage in system memory for STM32U083?
2. Is 0x1FFF7800 the confirmed start address of OPTR in non-volatile memory?
3. If this information is not in the reference manual, in which official document can I find the exact byte-level storage mapping?
4. What is the exact physical start address of Option Bytes in STM32U083?
5. In which official document is this address explicitly mentioned?
I am specifically looking for the physical storage address inside system memory, not the FLASH register base address.
2026-02-20 6:56 AM
Only the FLASH interface is documented and supported. The location within system memory, if even available to the user, is not supported and may change.
2026-03-12 10:12 AM
I am currently developing a programming algorithm for the device STM32U083RCT using an external gang programmer.
In many STM32 families, configuration option bytes are accessible through fixed memory addresses (for example 0x1FFF78xx in some devices). However, for STM32U083RCT it appears that the option bytes are managed internally by the Flash interface and are accessed through FLASH option registers instead of a direct memory-mapped address.
Because of this, we would like to clarify the correct way to access and program the configuration options when implementing an external programming algorithm.
Could you please confirm the following:
Since STM32U083RCT does not appear to expose option bytes through a fixed physical memory address (like 0x1FFF78xx in some other STM32 families), could you please clarify which physical address or register interface should be used to program the option bytes when implementing an external programming algorithm.
If the option bytes are only accessible through the FLASH peripheral registers, could you confirm which specific registers should be used to program and read the configuration options (for example FLASH_OPTR, FLASH_PCROP1SR, FLASH_PCROP1ER, FLASH_WRP1AR, FLASH_WRP1BR).
Could you also provide the correct programming sequence for writing these option bytes through the register interface, including the required unlock procedure, how the option registers should be written, how the OPTSTRT operation should be triggered, and how the option byte reload/reset should be handled.
Finally, please confirm whether reading back these FLASH option registers is the recommended method to verify the programmed configuration values.
Our goal is to correctly implement configuration read/program operations in the programming algorithm without relying on physical option byte addresses.
Your clarification would help ensure the configuration handling is implemented correctly.
2026-03-12 11:10 AM
All of this is provided in the relevant section (flash option bytes) of the Reference Manual. Did you read it?