2026-02-20 3:48 AM - edited 2026-02-20 5:38 AM
Heyho,
the title says it...
In RM0486, 14.6.5 PLL description, page 437 / 438 I find this:
Using the PLLs in fractional mode
PLL off ... set FRAC ... PLL on
Caution: Do not update DIVN and DIVNFRAC after the PLL has been enabled.
On the other hand, there are comments that some dividers can be changed on the fly.
So maybe it might work? Has anybody tried?
With these 4 PLLs and the great clock routing possibilities, the ability to change FRAC values on the fly with this high resolution would be a fantastic feature for synchronization, without using an external VCO.
Solved! Go to Solution.
2026-02-20 6:37 AM
Hi @LCE
For STM32N6, you should not change the FRAC value on the fly. The PLL must be disabled before updating DIVN or DIVNFRAC, as per the official RM0486.
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2026-02-20 6:37 AM
Hi @LCE
For STM32N6, you should not change the FRAC value on the fly. The PLL must be disabled before updating DIVN or DIVNFRAC, as per the official RM0486.
To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
2026-02-22 10:43 PM
Thanks, would have been a great feature.