Mysterious DMAMUX Input Signals: exti_syscfg_extiX, syscfg_extiX_mux

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I'm writing firmware for a development board based on the STM32H743 MCU, and I want to use an external GPIO input as the trigger or synchronization signal of DMAMUX to initiate DMA transactions. However, it seems that very little information is available on using GPIOs to start DMAs. 

In the reference manual, "Table 127. DMAMUX2: assignment of trigger inputs to resources" and "Table 128. DMAMUX2: assignment of synchronization inputs to resources", it shows two trigger input signals: "Syscfg_exti0_mux" (number 20), and "Syscfg_exti2_mux" (number 21). So it seems to suggest that the EXTI trigger sources can indeed be used to trigger the DMA, but these two signals are not mentioned anywhere in the entire reference manual, there's no block diagram showing exactly what GPIO pins are connected. It says "SYSCFG" and "MUX", so they're probably the outputs controlled by programming SYSCFG_EXTICR1, SYSCFG_EXTICR2, SYSCFG_EXTICR3, SYSCFG_EXTICR4. But there are 4 EXITCRx and only two "exti_syscfg_extiX". It is unclear which is controlling which.

In "Table 103. DMAMUX2 and BDMA connections (continued)", again, two similar signals called "exti_syscfg_exti0" and "exti_syscfg_exti2" appear again, but mentioned nowhere in the reference manual elsewhere.

Likewise, in "Table 102. DMAMUX1, DMA1 and DMA2 connections (continued)", there's yet another signal called "exti_exti0_it", appearing once and mentioned nowhere. In "Table 103. DMAMUX2 and BDMA connections (continued)", there are two additional signals called "it_exti_exti0_syscfg", and "it_exti_exti2_syscfg", again, appearing once and mentioned nowhere.

The documentation quality on the EXTI interconnect is disappointing.

Question: What are the differences between "Syscfg_exti0_mux", "exti_syscfg_exti0", "exti_exti0_it", "it_exti_exti0_syscfg"? These output are generated by whom? How do I trigger the DMAMUX via a GPIO input?

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The only mention of the signal "Syscfg_exti0_mux" on the entire Web was on a Chinese forum (called "Rough Guy Embedded"), which seems to provide a clue. The OP said,

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Using EXTI0 to trigger BDMA to transfer data input from the GPIO port to SRAM4 works normally. However, if EXTI0 is used to trigger DMA1 and DMA2 to transfer data input from the GPIO port to SRAM1~2, the DMA fails to start. A clue was found: In Table 117 of section 16.3.2 DMAMUX1 mapping in the H7 reference manual RM0433 V5, DMAMUX1 Trigger input #6 is marked as “extit0”. Meanwhile, Table 119 of section 16.3.3 DMAMUX2 mapping shows DMAMUX2 Trigger input #20 as “Syscfg_exti0_mux”.

Could this be the reason why BDMA using DMAMUX2 can be triggered by EXTI0, while DMA1~2 using DMAMUX1 cannot? I'd like to ask the gurus: does anyone know the details of the "extit0" and "Syscfg_exti0_mux" signals? I've searched the entire manual but can't find any source or description.

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The reply suggested:

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The interrupt should be enabled, it only works if you can enter the EXTI0_IRQHandler.

HAL_NVIC_SetPriority(EXTI0_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(EXTI0_IRQn);

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From another thread on this forum, Make EXTI generates a request to DMA1 on STM32H7, the OP was also able to get a statement from ST that:

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The behaviour with the EXTI0 is different in domain D3 (triggering BDMA from EXTI0). This is due to the fact that the domain D3 is designed for autonomous mode where both CPU core are OFF. The EXTI0 can only be used as an event. It is automatically cleared.

With DMAMUX1 in domain D2, if a trigger is needed without executing an IRQ handler, the EXTI0 is not the good one. A timer or a DMA event has to be used instead.

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So putting everything together...

If my understanding is correct, I think this is what happens:

1. The SYSCFG_EXTICRx registers provide 16 configuration 4-bit bitfields, each bitfield select a GPIO bank from A to K, the input pin must have the name number as the bitfield number. For example, bitfield 0 select the input GPIO bank of pin 0. This provides 16 multiplexed signal outputs EXTI[0:15].

2. Syscfg_extiX_mux is the raw output of EXTI[0:15]. Since only Syscfg_exti0_mux and Syscfg_exti2_mux are available as input, you can only use the signal EXTI[0] and EXTI[2], which correspond to GPIO[A:K] pin 0 and GPIO[A:K] pin 2. You cannot use other pins to trigger the DMA because of the lack of connections, but they don't need EXTI or NVIC.

3. exti_exti0_it is the output of the EXTI interrupt controller, the same signal also goes to the CPU's NVIC. The same signal is connected to some DMA controllers can use the interrupt to initiate DMA. But to use these signals to trigger DMA, EXTI's interrupt output to NVIC must also be enabled. So you either have to accept an IRQ as a side-effect, or enable IRQ on the EXTI but mask that IRQ on the NVIC (but then you have to find a way to clear the EXTI interrupt pending bit, otherwise this line remains active - which is why it's not recommended).

Hopefully I got everything right.