Looking for a sample Hard Fault Handler that can determine the location of the fault

[Jim Seymour]

I have a project that is using custom hardware with a STM32G0B1CBT6 processor.  The code is developed using STM32CubeIDE and STM32CubeMX.  However, there are times when I am unable to run a debug session and I'm seeing (very) occasional Hard Faults.

I have a diagnostic serial port and have successfully modified my Hard Fault Handler to dump additional information out that port.

So what I'm after is some code that can read registers and/or the stack to provide additional information that I can use (along with the map file, etc) to determine where my Hard Fault is happening.

Can anyone point me in the right direction?  All my searches have shown me code that references registers I can't seem to find in the docs.

Thanks.

[Andrew Neil]

https://community.st.com/t5/community-guidelines/how-to-write-your-question-to-maximize-your-chances-to-find-a/tac-p/708193/highlight/true#M51

---

@Jim Seymour wrote:

All my searches have shown me code that references registers I can't seem to find in the docs.

---

What registers are those, and what docs are you looking in?

For core registers, you'll need the ARM documentation rather than ST's

Cortex-M0 lacks some of the debug registers of larger cores ...

[mƎALLEm · Accepted solution]

Hello,

How to debug a HardFault on an Arm® Cortex®-M STM32

[Jim Seymour]

I found the article that mƎALLEm linked to below - and got lost when I couldn't find the SHCSR register that it references.  But if it's not in ST's docs, then that explains my confusion.

I'll take a closer look at that article.  It probably has what I need.

Thanks.

[Pavel A.]

SCB->SHCSR

The STM32 docs consist of 3 main parts, one of them is Programming Manual (PM) which describes the ARM core of the STM32. There you find these things.

[Andrew Neil]

---

@Jim Seymour wrote:

 I couldn't find the SHCSR register

---

It's the System Handler Control and State Register - see the ARMv6-M Architecture Reference Manual.