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LAN8742A PHY: Unstable Ethernet at 100 MHz

Charlu31
Associate

Hello STM32 world!

Here are a few words to share our issues—now resolved—with the LAN8742A Ethernet PHY.
We designed a board based on the STM32H573, featuring an Ethernet interface.
We strictly followed the design used in STM32 boards, particularly the STM32H573-DK evaluation board.
Unfortunately, the 100MHz auto-negotiation was unstable, making communication nearly impossible.
However, our board complied with all the constraints specified by Microchip in terms of BOM, placement, and routing, including properly matched 100Ω differential lines on the Ethernet side.
After losing a lot of time, we reached out to Microchip support.
They responded quickly and informed us that the issue was caused by our oscillator.
We were generating the 25MHz clock for both the STM and the PHY using a standard MEMS oscillator. These oscillators have a jitter of ±28ps max, which is too high for the PHY’s PLL. However, this crucial detail is not mentioned in Microchip’s datasheet or application notes.
A MEMS oscillator with less than ±8ps jitter is required—or, even better, a quartz oscillator (<1ps).
After replacing the oscillator, the board now works flawlessly.

1 REPLY 1
STOne-32
ST Employee

Dear @Charlu31,

Welcome in our STCommunity,  Thanks a lot ( Merci beaucoup ) for your valuable contribution and informing our STM32 developers with this hint and important key Parameter ( maximum Jitter ) for the Ethernet PHY ! Much appreciated .

STOne-32