Posted on May 17, 2011 at 13:28Hi,
in my program, the Systick-interrupt sets an external
interrupt request in the EXTI-SWIER. When this is done, while the
corresponding bit in the EXTI-IMR is set, everything is ok.
But when:
- the main routine disables this int by clearing the IMR-bit
- with the cleared IMR-bit the SWIER-bit is set (by the still enabled
Systick-int with high priority)
- the main routine reenables the int
then the SWIER bit remains set, but no pending request is set and no int
is generated.
It looks like the SWIER is ANDED with the IMR, in contrast to the
block diagram in RM0008 (June 2009-Version), 9.2.2- Figure 20.
But even then there should be an interrupt when SWIER and IMR - bits
are set, regardless of the sequence of their settings. Right?
Even more, it is said that the PendingRequestRegister must be cleard by
software by writing a 1 to the bit. But this is done by hardware at the
start of the interrupt service routine. At the same time the SWIER-Bit
is automatically cleared. So, no action has to be taken in software.
(That's what I found out).
Detlef
