2020-02-18 12:36 PM
I am using the H7 and have a 10MHz sigma-delta ADC sending the Manchester signal. I do not have a clock going to the ADC because it generates its own.
The internal DFSDM clock is set correctly, I think. I have a system clock of 96MHz and CKOUTDIV is set to 8.
The problem shows itself as readings that jump to the opposite polarity for a dozen or two samples then return to the correct reading.