HSI + PLLMUL

[alanrouse29]

Posted on November 18, 2009 at 08:08

HSI + PLLMUL

[alanrouse29]

Posted on May 17, 2011 at 13:30

The specification for the RCC shows that the PLLMUL input can be switched between the HSE clock, HSE/2 or HSI/2. To date I have used HSE with an external 8MHz crystal. I then set PLLMUL to x9 to give an internal SYSCLK of 72MHz.

However, I am now trying to use the internal HSI oscillator. The spec says this is 8MHz, but is fed through a /2 divider to the PLL. This suggests that setting PLLMUL to x9 will set SYSCLK to only 32MHz. It also suggests that the highest SYSCLK frequency achievable is 64MHz, since the highest value for PLLMUL is x16. If I try setting PLLMUL higher than x9 with HSI/2 as the source I get a hardware fault. Can anyone explain this? Could it be that HSI is really 16MHz?

[swhite]

Posted on May 17, 2011 at 13:30

You can only achieve a clock frequency of 64MHz when using the HSI.

using_hse_clock = (RCC_WaitForHSEStartUp() == SUCCESS); ... if (using_hse_clock) { // 8MHz HSE x9 PLL ==> SYSCLK = 72MHz. RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); } else { // 8MHz HSI /2 x16 PLL ==> SYSCLK = 64MHz. RCC_PLLConfig(RCC_PLLSource_HSI_Div2, RCC_PLLMul_16); } FYI the above code snippet is from a real project I wrote. It DOES work with or without an 8MHz crystal (i.e. 72 or 64MHz) :-][ This message was edited by: swhite on 18-11-2009 12:40 ]