2015-11-14 03:13 AM
Hi,
I have an hardware with a stm32F7xx and an FTDI chip (4232) that controls the JTAG. I would like to program the flash of the stm32F7xx via openocd (this procedure is really straightforward for the previous stm32F4xx). Impossible to program this flash. In the openocd community the activity around this stm32F7xx is really poor. For hardware reason I cannot use J-Link.So, any experience around this topic? Just as a complement of information:1. I patch openocd-0.9.0 with some proposed improvements for supporting the stm32F7xx flash2. here is my openocd script (that works like a charme for the stm32F4xx)interface ftdiftdi_vid_pid 0x0403 0x6011ftdi_channel 1ftdi_layout_init 0x0008 0x000bsource [find target/stm32f7x.cfg]initreset haltsleep 1000stm32f2x mass_erase 0flash write_image ./EPROM.elfreset runshutdownThank you for your feedbacks Edo.Here is the logOpen On-Chip Debugger 0.10.0-dev-00104-gf3be0f6 (2015-11-12-22:41)Licensed under GNU GPL v2For bug reports, read http://openocd.org/doc/doxygen/bugs.htmlInfo : auto-selecting first available session transport ''jtag''. To override use 'transport select <transport>'.adapter speed: 2000 kHzadapter_nsrst_delay: 100jtag_ntrst_delay: 100srst_only separate srst_nogate srst_open_drain connect_deassert_srstcortex_m reset_config sysresetreqInfo : clock speed 2000 kHzInfo : JTAG tap: stm32f7x.cpu tap/device found: 0x5ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x5)Info : JTAG tap: stm32f7x.bs tap/device found: 0x06449041 (mfg: 0x020, part: 0x6449, ver: 0x0)Warn : JTAG tap: stm32f7x.bs UNEXPECTED: 0x06449041 (mfg: 0x020, part: 0x6449, ver: 0x0)Error: JTAG tap: stm32f7x.bs expected 1 of 1: 0x06449071 (mfg: 0x038, part: 0x6449, ver: 0x0)Error: Trying to use configured scan chain anyway...Warn : Bypassing JTAG setup events due to errorsInfo : stm32f7x.cpu: hardware has 8 breakpoints, 4 watchpointsError: stm32f7x.cpu -- clearing lockup after double faultPolling target stm32f7x.cpu failed, trying to reexamineInfo : stm32f7x.cpu: hardware has 8 breakpoints, 4 watchpointsError: Can't assert SRST: nSRST signal is not definedInfo : JTAG tap: stm32f7x.cpu tap/device found: 0x5ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x5)Info : JTAG tap: stm32f7x.bs tap/device found: 0x06449041 (mfg: 0x020, part: 0x6449, ver: 0x0)Warn : JTAG tap: stm32f7x.bs UNEXPECTED: 0x06449041 (mfg: 0x020, part: 0x6449, ver: 0x0)Error: JTAG tap: stm32f7x.bs expected 1 of 1: 0x06449071 (mfg: 0x038, part: 0x6449, ver: 0x0)Error: Trying to use configured scan chain anyway...Warn : Bypassing JTAG setup events due to errorsError: Can't assert SRST: nSRST signal is not definedstm32f7x.cpu: target state: haltedtarget halted due to debug-request, current mode: Handler HardFaultxPSR: 0x01000003 pc: 0xfffffffe msp: 0xffffffd8Info : device id = 0x10016449Info : flash size = 1024kbytesstm32x mass erase completeError: JTAG-DP OVERRUN - check clock, memaccess, or reduce jtag speedError: MEM_AP_CSW 0x2800062, MEM_AP_TAR 0x20000054Error: Failed to read memory at 0x20000054Error: failed to get read pointerError: JTAG-DP OVERRUN - check clock, memaccess, or reduce jtag speedError: MEM_AP_CSW 0x2800062, MEM_AP_TAR 0x20000050Warn : target was in unknown state when halt was requestedError: stm32f7x.cpu -- clearing lockup after double faultError: error waiting for target flash write algorithmError: error writing to flash at address 0x08000000 at offset 0x000000002015-11-14 04:37 AM
Remi and me did some work around F7 with patches hanging in the queue for some time. The patches got applied recently. So try OpenOCD git head. Let us know if there are loose ends.
Bye2015-11-14 05:06 AM
Thank's Uwe,
I will try again your last openocd commit.I will keep you in touch, thank'sRegards, Edo2015-11-14 06:07 AM
Uwe,
Just tried your suggestion.I downloaded the last openocd from the gitgit clone git://git.code.sf.net/p/openocd/code openocd
Unfortunately, I got exactly the same log I posted.Did you already tried to burn the flash of the F7 by JTAG-openocd?Edo2015-11-14 09:20 AM
Please take the discussion to the openocd-user mailing list. The forum software here drives me nuts. I just uploaded an executable to the F7 disco board via the built-in stlink v2.1 and openocd git master.
Did you really use the new compiled executable? Was was your command line? Did the F7 get recognized? What was the terminal output? Any hints in a -d3 debug log?