How to implement OTG FS hardware using embedded PHY on STM32F105/107 microcontrollers

[Reza_Jaferi]

I want to be able to use the DFU¹ and OTG² FS³ functionalities through two micro USB sockets.

So I have a question, which you will see at the end.

My design uses the STM32F105RBT6 microcontroller.

I designed the following schematic, which includes two micro USBs (one for power and one for both power and data). The schematic is separated into two parts to improve readability and display the connections of the microcontroller's power supply block.

Part A:

Part B:

According to screenshots of the tables that I collected from AN4879 and AN2606, the STM32F105RBT6 microcontroller supports OTG FS and DFU.

 

The OTG FS for STM32F105/107 (which does not support OTG HS⁴) has an internal PHY⁵ and a pull-up resistor; thus, I attempted to use section 3.3 of AN4879.

Regarding the figure that is presented below:

• The OTG specification requires the use of a capacitor (maximum value 4.7 μF) on VBUS.

• The ESD protection chip, if used, must be placed as close as possible to the USB connector.

• A power switch (such as STMPS2151STR) is required.

• When an overcurrent is detected, the information is sent to the STM32 software, which alerts the user about the issue (it is recommended to route VBUS far from DP/DM).

• The STM32 must always be supplied when the platform is connected as device to a host (in case of dead battery support, the voltage on PA9 must be reduced as explained in Section 2.6).

Also, I found the following schematic from the first version of AN4879 (released on August 10, 2016):

My question: Will my hardware schematic design (as you can see, I used two micro USBs with their connections in parallel) work correctly for the purpose I have?

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