2023-06-29 8:17 PM
I'm writing a bootloader and trying to use HAL_FLASH_Program() and noticed that a word is listed as 32 bits. Is this an ST specific word size? I've always thought that a word = 2 bytes = 16 bits. But it appears that if I want to write a word with HAL_FLASH_Program() I'll have to pack 4 bytes (32 bits) together, correct?
/** @defgroup FLASH_Type_Program FLASH Type Program
* @{
*/
#define FLASH_TYPEPROGRAM_HALFWORD (0x01U) /*!<Program a half-word (16-bit) at a specified address.*/
#define FLASH_TYPEPROGRAM_WORD (0x02U) /*!<Program a word (32-bit) at a specified address.*/
#define FLASH_TYPEPROGRAM_DOUBLEWORD (0x03U) /*!<Program a double word (64-bit) at a specified address*/
2023-06-30 2:21 AM
Word has frequently been the natural register width of the machine. ARM long being a 32-bit machine has had 32-bit words and 16-bit half-words, and 64-bit double words.
Flash lines, the decode width of the array, can be even larger
2023-06-30 9:09 AM - edited 2023-06-30 9:10 AM
In this context "word" means the "word" of the internal flash subsystem. Not related to the ARM CPU.
As to how many of what you need to pack together: this flash can be programmed in units of variable size; the more bits in the unit, the more power must be applied at once. This is called "parallelism" in the STM32 documentation. In its turn, available power depends on the Vcc. All "parallelism" options are available at the max VCC (3.3V) and only the least is available at the minimal possible Vcc. You specify the unit size in the flash write API call.
The flash programming thing has a little state machine that counts the bits (or bytes) written by the CPU into successive addresses. As soon as it sees a compete "parallelism unit" it triggers the write. For example: if you specify the "parallelism unit" of 64 bytes, it waits until you write two 32-bit words to successive addresses, then starts programing 64-bit. The destination address must be aligned, of course.
Some STM32s have only one unit size of 32 or 16 bytes.