2019-12-12 12:07 AM
I am using a STM32F103C6 CPU. I want to DMA read TIMx_CCR1 and TIMx_CCR2 after a capture 2 is done (i.e. CC2DE bit set in TIMx_DIER). Since this can be done as a burst transfer (the 2 registers are contiguous), I set up TIMx_DCR accordingly (2 transfers starting form TIMx_CCR1). If I understand correctly, with this configuration, TIMx_DMAR will take the value of TIMx_CCR1 on the first read from the DMA controller, and then the value of TIMx_CCR2. This should work fine (I haven't tested it yet).
However I think the exact same result is achieved by configuring the DMA channel to start reading from TIMx_CCR1 address, and read 2 values with automatic increment. Am I missing something or is it the case? Is there any advantage of using one method over the other?