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CAN RX IRQ Question STM32F429

Mark Edwards
Associate II
Posted on June 27, 2015 at 19:16

//----------------------------------------------------------------------------
setup CAN interface
*----------------------------------------------------------------------------*/
void CAN_setup (uint32_t ctrl) {
CAN_TypeDef *pCAN = (ctrl == 1) ? CAN1 : CAN2;
uint32_t brp;
if (ctrl == 1) {
// Enable clock for CAN1 and GPIOB */
RCC->APB1ENR |= (1 << 
25
);
RCC->AHB1ENR |= (1 << 
1
);
// CAN1, PB.8, PB.9 */
GPIOB->MODER &= ~(( 3 << ( 8*2)) | ( 3 << ( 9*2)));
GPIOB->MODER |= (( 2 << ( 8*2)) | ( 2 << ( 9*2)));
GPIOB->OTYPER &= ~(( 1 << 
8
) | ( 1 << 9 ));
GPIOB->OSPEEDR &= ~(( 3 << ( 8*2)) | ( 3 << ( 9*2)));
GPIOB->PUPDR &= ~(( 3 << ( 8*2)) | ( 3 << ( 9*2)));
GPIOB->AFR[1] &= ~((15 << ( 0*4)) | (15 << ( 1*4)));
GPIOB->AFR[1] |= (( 9 << ( 0*4)) | ( 9 << ( 1*4)));
NVIC_EnableIRQ (CAN1_TX_IRQn); // Enable CAN1 interrupts
NVIC_EnableIRQ (CAN1_RX0_IRQn);
NVIC_EnableIRQ (CAN1_SCE_IRQn); // CAN1 Error Detection
// CAN1 Automatic Retransmission used
pCAN->MCR = (CAN_MCR_INRQ); // initialisation request
// AUTOMATIC RETRANSMISSION
// only FIFO 0, tx mailbox 0 used
} else {
// Enable clock for CAN2 and GPIOB */
RCC->APB1ENR |= (1 << 
25
) | (1 << 26);
RCC->AHB1ENR |= (1 << 
1
);
// CAN2, use PB12, PB13 */
GPIOB->MODER &= ~(( 3 << ( 12*2)) | ( 3 << ( 13*2)));
GPIOB->MODER |= (( 2 << ( 12*2)) | ( 2 << ( 13*2)));
GPIOB->OTYPER &= ~(( 1 << 
12
) | ( 1 << 13 ));
GPIOB->OSPEEDR &= ~(( 3 << ( 12*2)) | ( 3 << ( 13*2)));
GPIOB->PUPDR &= ~(( 3 << ( 12*2)) | ( 3 << ( 13*2)));
GPIOB->AFR[1] &= ~((15 << ( 4*4)) | (15 << ( 5*4)));
GPIOB->AFR[1] |= (( 9 << ( 4*4)) | ( 9 << ( 5*4)));
NVIC_EnableIRQ (CAN2_TX_IRQn); // Enable CAN2 interrupts
// NVIC_EnableIRQ (CAN2_RX0_IRQn);
NVIC_EnableIRQ (CAN2_SCE_IRQn); // CAN2 Error Detection
// CAN2 Detects TX Failure and handles it in code
pCAN->MCR = (CAN_MCR_INRQ | // initialisation request
CAN_MCR_NART ); // no automatic retransmission
// only FIFO 0, tx mailbox 0 used 
}
//=================================================================
while (!(pCAN->MSR & CAN_MCR_INRQ));
if (ctrl == 1) {
pCAN->IER = CAN_IER_FMPIE0;
}
else {
pCAN->IER = (CAN_IER_FMPIE0 | // enable FIFO 0 msg pending IRQ
CAN_IER_TMEIE | // enable Transmit mbx empty IRQ
CAN_IER_LECIE ); // Enable Last Error Code IRQ 
}
pCAN->BTR = 0x0338003F; // SWJ=3, TS2=0x3, TS1=0x8, BRP=0x3F
}

I have CAN1 setup as RX only and it works fine, but whenever it receives a message it generates two interrupts. One when the FMP0 bits are 1 (indicating the FIFO contains data) and then another when both ESR and RFOR are 0. The only IRQ that is enabled is FMPIE0 which causes an IRQ when FMP isn't 0 which makes sense, but why the second IRQ? And is there something I could set to stop it? #can-rx-irq
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