cancel
Showing results for 
Search instead for 
Did you mean: 

Can an F0 be configured to capture X adc samples from a single channel after an EXT trig?

darcy2
Associate
Posted on October 06, 2016 at 23:13

I was able to achieve something similar on the F1 by using the ADC in discontinuous mode and specifying ranked regular conversions of the same channel up to 16 times.

Using this method, an external trigger (e.g. TIM OC) could be used to capture X conversions of a single channel every time the external trigger fired.  Great!

Can I do this with the F0?  I have a 70-200 microsecond window in which I need to take about 8 samples of a single channel.  In 12 bit mode, with a 71.5 cycle conversion, that takes 5.11us (let's round to 5us).  I want to ignore the first 15-20us of my minimum 70us pulse.  The way I would have done this on the F1 is to DMA capture 20us + 40us of samples in to a circular buffer only big enough to hold the last 40us (i.e. so a total of 12 conversions, in to an 8 sample circular buffer).  After the conversion has taken place, I can then inspect the buffer to retrieve the samples taken in the window between 20 and 60 micro seconds.  Great!

Can I do anything like this on the F0?  It seems I can start the DMA conversion on a single channel, but that there isn't a way to say ''Do it 12 times only, then stop''.  

I can sample 16 different channels once each then stop...  but not the same channel 16 times.

I could conceivably use the falling pulse edge to 'stop' the conversion but there isn't a method to do that either from what I can see.

Have I missed something in the manual, or is this just a pitfall of the reduced functionality on the F0?

Thanks all!

#stm32f0-adc-dma
2 REPLIES 2
darcy2
Associate
Posted on October 06, 2016 at 23:26

I may have found a solution...  perhaps?  

Potentially, I could set up the DMA to capture in to a buffer of 12 samples in length, and then set the ADC to continuous and use DMA one shot mode.  If I then throw away the first four samples, the last eight are potentially the ones I want (based on above description).

Does this stack up?

Thanks

Darcy
Walid FTITI_O
Senior II
Posted on October 10, 2016 at 16:29

Hi williams.darcy.001, 

Try the DMA transfer suspension described in the application note 

http://www.st.com/content/ccc/resource/technical/document/application_note/27/46/7c/ea/2d/91/40/a9/DM00046011.pdf/files/DM00046011.pdf/jcr:content/translations/en.DM00046011.pdf

 ''Tips and warnings while programming the DMA controller''

''

4.8 DMA transfer suspension

At any time, a DMA transfer can be suspended to be restarted later on or to be definitively

disabled before the end of the DMA transfer.

There are two cases:

• The stream disables the transfer with no later-on restart from the point where it was

stopped: there is no particular action to do, except to clear the EN bit in the DMA_SxCR

register to disable the stream and to wait until the EN bit is reset. As a consequence:

– The DMA_SxNDTR register contains the number of remaining data items at the

moment when the stream was stopped so that the software can determine how

many data items have been transferred before the stream was interrupted.

• The stream suspends the transfer in order to resume it later by re-enabling the stream:

 

to restart from the point where the transfer was stopped, the software has to read the

 

DMA_SxNDTR register after disabling the stream (EN bit at “0�) to know the number of

 

data items already collected. Then:

 

– The peripheral and/or memory addresses have to be updated in order to adjust

 

the address pointers.

 

– The SxNDTR register has to be updated with the remaining number of data items

 

to be transferred (the value read when the stream was disabled).

 

– The stream may then be re-enabled to restart the transfer from the point where it

 

was stopped.

 

Note: In both cases, a Transfer Complete Interrupt Flag (TCIF in DMA_LISR or DMA_HISR) is set

 

to indicate the end of transfer due to the stream interruption

''

So you can update the transfer size (DMA_SxNDTR )and memory target inside the call back. 

-Hannibal-