Bug Report STM32F10x_StdPeriph_Driver

[julian23]

Posted on November 14, 2014 at 18:14

Hi, I'm just starting on ARM CORTEX and STM32 via The Spark Core so forgive me if I'm missing something but in file stm32f10x_tim.c

Function

void

http://stm32.kosyak.info/doc/group___t_i_m___exported___functions.html#ga9eb1e95af71ed380f51a2c6d585cc5d6

(

http://stm32.kosyak.info/doc/struct_t_i_m___type_def.html

* TIMx, uint16_t TIM_IT)the lines

02681

/* Clear the IT pending Bit */

02682 TIMx->

http://stm32.kosyak.info/doc/struct_t_i_m___type_def.html#a44962ea5442d203bf4954035d1bfeb9d

= (uint16_t)~TIM_IT;should surely read

02681

/* Clear the IT pending Bit */

02682 TIMx->

http://stm32.kosyak.info/doc/struct_t_i_m___type_def.html#a44962ea5442d203bf4954035d1bfeb9d

&= (uint16_t)~TIM_IT;With &= instead of just = otherwise the function is clobbering all the flags in the status register. That's all.

[Tesla DeLorean]

Posted on November 14, 2014 at 18:52

But doing it your way introduces a HUGE HAZARD given the window of the Read-Modify-Write with respect to the peripheral's clock. Suggest you look at the reference manual a bit harder, and think like an IC designer, not a SW engineer.

[Tesla DeLorean]

Posted on November 14, 2014 at 21:28

If you're still pondering on this, remember if you AND something with ZERO it will clear it. Peripheral registers are not memory cells, and can change outside program / cpu control. An interrupt can assert between the time you read and when the write occurs. It's also dangerous to use bit-banding writes on this, and other, registers.

TIMx->

http://stm32.kosyak.info/doc/struct_t_i_m___type_def.html#a44962ea5442d203bf4954035d1bfeb9d

= (uint16_t)~TIM_IT; At a hardware level operates as SR_NEXT := (SR_CURRENT & ~TIM_IT) | INTERRUPTS_NEW, on the synchronous edge on a single clock.

[julian23]

Posted on November 14, 2014 at 22:10

OK, thanks. Perhaps I did deserve the patronising comment. My problem was not knowing that the term rc_w0 lurking in the manual was significant & that the register bits were reset only on write. I do appreciate the danger of read-modify-write cycles.