Posted on May 17, 2011 at 12:36From my reading of the manuals (I haven't tried this, so someone please correct me if I'm wrong). You should be able to use one of the timers to trigger the DMA from memory to the SPI. The same timer should hopefully be able to be programmed to output a pulse for the CS line.
For those SPI chips that are in sleep mode when CS is high, this is probably a superior way of controlling CS (possible power savings).
Assuming the above is possible, there is a problem if your only clock source is a 32 KHz crystal. Then the timers can only be synchronised to the HSI - which might be a problem for producing accurate waveforms etc.
I use DMA to a small LCD via the SPI, but the DMA trigger is the SPI buffer empty signal. I send about a 100? bytes at a time. Ideally there should be a CS signal for every byte, but I have found that it works fine if I manually put CS before the start of the transfer and keep it low until the transfer finishes.
I have noticed that for some chips the CS needs to be low for a minimum of 10 nanoseconds before the first rising clock edge ie. not very long. If the SPI clock signal remains high between transfers (I can't remember and my hardware is out of action for the moment) - then I wonder if the CS signal could be derived from the clock signal (the first falling edge) using a schottkey diode plus resistor and capacitor? Just a thought - probably too risky to put in any proper design.
