Hello ST Support Team,
I am working on an STM32G474RE based 3-phase VFD using HRTIM1 for SVPWM generation.
Hardware/output:
- Timer A/B/C used for U/V/W phases
- TA1/TA2, TB1/TB2, TC1/TC2 complementary PWM
- Dead-time enabled
- Center-aligned PWM required
- Carrier frequency: 5 kHz to 10 kHz
- SVPWM duty updated from Master REP interrupt
Current configuration:
- HRTIM Timer A/B/C counting mode: UP_DOWN
- Output set source: TIMCMP1
- Output reset source: TIMCMP2
- CMP1 = (PER - pulse_width) / 2
- CMP2 = CMP1 + pulse_width
- Master timer REP interrupt calls SVPWM calculation
- Compare registers are updated inside the REP interrupt
- Preload is enabled for Timer A/B/C
- Master period and Timer A/B/C periods are kept same
Problem:
PWM carrier is generated, complementary output and dead-time are working, but the SVPWM envelope is not clean/stable. At some modulation values the envelope appears filled or uneven, and output voltage under load drops/varies. Fixed-duty PWM test looks clean, so the issue seems related to synchronized compare update / HRTIM update event timing.
Please guide the recommended HRTIM configuration for STM32G474RE 3-phase center-aligned SVPWM:
1. For center-aligned complementary PWM, should output SET/RESET be:
- SET = TIMCMP1 and RESET = TIMCMP2
or
- SET = period/reset event and RESET = CMP1?
2. In UP_DOWN counting mode, what is the correct compare event configuration to avoid double compare events on up-count and down-count?
3. What should be the recommended preload/update configuration for Timer A/B/C so all three phase compare values latch synchronously?
4. Should Timer A/B/C update trigger be MASTER update, MASTER repetition, or each timer repetition?
5. Should compare registers be written directly inside Master REP interrupt, or should they be written to preload registers and latched at a later update event?
6. For 3-phase SVPWM on STM32G474 HRTIM, is there an ST application note or reference example showing:
- HRTIM complementary PWM
- dead-time insertion
- center-aligned 3-phase PWM
- synchronous CMP1/CMP2 update for SVPWM?
Target MCU: STM32G474RE
Tool: STM32CubeIDE / STM32CubeMX
Peripheral: HRTIM1
Thank you.
