STM32H5: PVD interrupt not triggered

[jowakar122]

I am using STM32H573 and I have tried to enable PVD some what like this:

void PVD_Init()
{
	PWR_PVDTypeDef pvdconfig;

	HAL_NVIC_SetPriority(PVD_AVD_IRQn, 5, 0);
	HAL_NVIC_EnableIRQ(PVD_AVD_IRQn);

	pvdconfig.Mode = PWR_PVD_MODE_IT_RISING_FALLING;
	pvdconfig.PVDLevel = PWR_PVDLEVEL_7;

	HAL_PWR_ConfigPVD(&pvdconfig);
	HAL_PWR_EnablePVD();
}

void HAL_PWR_PVDCallback()
{
//	HAL_GPIO_WritePin(GPIOC, LED_1_Pin, GPIO_PIN_SET);
	printf("\rBefore RESET COUNT: %.2f\n", counter);
	EEPROM_Write_NUM(0, 0, counter);
}

Someone might say to enable the clock but for this module I don't think we need to manually enable the clock. I have looked into it and am pretty sure about it. If anyone else have some other theories please let me know. Also made sure that EXTI 16 is connected internally. 

[MHoll.2]

Do You have the "low level" IRQ Function (PVD_AVD_IRQHandler()) calling the HAL IRQ Handler (HAL_PWR_PVD_IRQHandler)?

[jowakar122]

void PVD_AVD_IRQHandler(void)
{
    HAL_PWR_PVD_IRQHandler();
}

@MHoll.2 

If you are referring to this then I have added this in stm32h5xx_it.c file

[MHoll.2 · Accepted solution]

Yes, exactly, so this should work. If You never hit a brakepoint in this function, then you have to dig into this with the debugger (Trigger the Event by changing the Voltage on VDD, an then check the PVDO Bit in PWR_VMSR  register to see if Voltage drop was registered, then check if it is register in EXTI and so on).

I only noticed now that you are using PWR_PVDLEVEL_7 this will connect the comparator to the PVD_IN pin (PB15). So You have to move the Voltage on PB15, not VDD.

[jowakar122]

@MHoll.2 I am working on custom hardware in which ETH_TXD1 is allocated on PB15. 

Moreover, different power level connects the comparator to different pins?

[MHoll.2]

No PWR_PVDLEVEL_7  is special, please read the reference manual (rm0481) chapter 10. PWR_PVDLEVEL_0 to PWR_PVDLEVEL_6 are using Vdd for the comparator input while PWR_PVDLEVEL_7 use PB15. Why did You select PWR_PVDLEVEL_7? Try selecting PWR_PVDLEVEL_6.

[jowakar122]

@MHoll.2 I understood the use of PWR_PVDLEVEL_7 and when to use. I made the required changes like selected PWR_PVDLEVEL_6 and now interrupt is being triggered.
Thanks for your help.
But one last thing:

This is mentioned in the manual, so as per this if I want interrupt before RESET then I have to opt for RISING? Moreover, in my case it is working for RISING and not for FALLING. 

[MHoll.2]

Yes, the PVDO signal is "inverted", so falling edge = PVDrising, and Rising edge = PVDfalling:

You configuration should generate an Interrupt on both edges (to detect this you can read the EXTI_RPR1 and / or the EXTI_FPR1 register).

Be aware that You have to clean the triggered event, by writing 1 to the RPIF16 and / or the FPIF16 bit.