STM3240G-EVAL USB device EP2 gets no data

[andre239955_st]

Posted on June 05, 2013 at 08:05

Hello,

I am using the latest version of the STM32 USB library on the STM3240G eval board. I have modified the MSC example with my own configuration. This one is coming from a library we bought and works on a STM32F105. Enumeration is exactly the same as with our preveous products so no problem here. But when I start our application on the pc which sends data to EP2 out the ST responds with a NAK instead on ACK (seen with USB analyzer). No interrupt is called and I can't find where I go wrong. The code of my application is exactly the same as the MSC example, exept that I use EP2 out instead of EP1 out. I have inserted a table inside the ReadPacket routine (see below) and I can observe that the complete enumeration got into the fifo. Everything but the OUT package which is send by my pc application (3 bytes: 0x89, 0x13, 0x00) to endpoint 2 which is answered with a NAK. It looks like the USB core refuses this package, because the SOF's come through. I have investigated on register level that every bit is set on the right place, interrupts are enabled but not called (except SOF). I just can't find out WHY this package is NAK-ed. If anyone can give me a hint or even a ''stupid'' remark.... Thanks! void *USB_OTG_ReadPacket(USB_OTG_CORE_HANDLE *pdev, uint8_t *dest, uint16_t len) { uint32_t i=0; uint32_t count32b = (len + 3) / 4; __IO uint32_t *fifo = pdev->regs.DFIFO[0]; for ( i = 0; i < count32b; i++, dest += 4 ) { *(__packed uint32_t *)dest = USB_OTG_READ_REG32(fifo); /***********/ if((myflag == 1) && (myindex_w != 2048)); { myfifo_dwa[myindex_w] = *(__packed uint32_t *)dest; myindex_w++; } /***********/ } return ((void *)dest); } #stm32-usb

[tsuneo]

Posted on June 05, 2013 at 19:14

To receive on the OUT endpoint without NAK, DCD_EP_PrepareRx() should be called after the OUT endpoint is opened by DCD_EP_Open()

Tsuneo

[andre239955_st]

Posted on June 06, 2013 at 10:45

Thanks but this is done, just like in the example code. I just changed the number of the endpoint from 1 to 2...

Dreeke 

[redmonds2]

Posted on March 25, 2014 at 15:38 Curiously, I have the inverse problem. I am able to send USB_OTG_EP_BULK packets from the computer host to EP2 on the STM32F105 device, but unable to send from the device to the host. As with your case, everything is fine both ways if I use EP1. I'm searching in the ST libraries for somewhere where the wrong bitmask has been used or the wrong registers, but have not found it yet. It would be re-assuring to hear that this is not a problem with the STM32F105 device. Richard

[redmonds2]

Posted on March 25, 2014 at 16:14 Found it! The problem is in USB_CONF.H /****************** USB OTG FS CONFIGURATION **********************************/ #ifdef USB_OTG_FS_CORE  #define RX_FIFO_FS_SIZE                          128  #define TX0_FIFO_FS_SIZE                          64  #define TX1_FIFO_FS_SIZE                         128  #define TX2_FIFO_FS_SIZE                          0  #define TX3_FIFO_FS_SIZE                          0 Seems that no space had been assigned in the ''PMA'' for EP2 or EP3. Changing this to #ifdef USB_OTG_FS_CORE  #define RX_FIFO_FS_SIZE                          128  #define TX0_FIFO_FS_SIZE                          64  #define TX1_FIFO_FS_SIZE                         32  #define TX2_FIFO_FS_SIZE                          32  #define TX3_FIFO_FS_SIZE                          32 makes EP2 work (sizes are in 32-bit words I think), but I'd better go check that it didn't break something else BTW, I tried reducing the sizes of the fifo on the control endpoint 0,  #define RX_FIFO_FS_SIZE                            16  #define TX0_FIFO_FS_SIZE                          16 but this caused problems during enumeration.