2013-10-17 01:48 AM
We are developing a board with STM32F207 and we are planning to use ST-Link JTAG to download our programs to the internal memory flash of the uC and for debugging.
The first problem we have encountered are the BOOT 0-1 pins configuration, used to start the uC from Flash Memory or System Memory. Our assumption is that the ST-Link JTAG, once connected, takes control of the uC boot sequence, and, when disconnected, the boot sequence control returns to the uC. Following this assumption, we would set Boot 1-0 to X-0 respectively in order to boot the uC from the flash memory when ST-Link is not connected.The question is if this assumption is true, and in case it isn't, we would appreciate any help or directions on how to proceed regarding this matter.Thanks in advance, #st-link-jtag-stm32-bootloader2013-10-17 06:26 AM
Well, technically the JTAG/SWD has to wrestle control away from the processor, to the extent that BOOT0/1 effect this it is possible to place user code on the device which can break or disrupt JTAG connectivity. In these situations it is useful to be able to take BOOT0 high so that the part can be recovered.
Provide the means to set BOOT0/1 to run from FLASH by default, but settable to allow the SYSTEM LOADER to be started.