I was wondering if I can get some feedback on the following project, mainly if the requirements I have are feasible?
I was thinking on using an STM32F4 or STM32F7.
The project consist of the following parts:
I am not looking for an implementation, just a feel if this is possible to create (seeing the 'high' data/sample rates) on an STM32F4 or STM32F7, since I don't have experience with DMA.
Depends a lot on the card, and the ability to write large media and file system aligned blocks of data. ie Clusters or Erase Block, 32 KB perhaps a good mix of size and alignment. Alignment of the file pointer being most critical in reducing unnecessary busy work and card interactions.
Several MB/s should be within reach on most platforms.
Thanks for your reply!
No ADC part has been selected yet, but I assume it would use normal SPI.
From your reply it sounds that using DMA will work for this set-up. Time to get my hands dirty and test this :-).