2022-06-13 09:18 AM
I'm a newbie to STM products. Lots of experience with other vendors, and am used to seeing example solutions that go from point A to point B. STM seems to provide tool descriptions (and I understand why given the combinations of tools, versions, processors, etc). But I'm stumped pulling it all together.
I have a system design that has an STM32L051xx with I2C to the outside world and it uses UART2 to communicate to an inaccessible STM32L041xx on UART2. The L051 has a command set to talk to the outside world. The 051 tells the 041 what to do via USART2 on both uC's. The SWD and BOOT pins are not accessible (I have 2 long optical wires connecting the 2 UARTS), and no other L041 uC access.
Hardware design changes are not possible due to the nature of the product.
AN2606 section 53 shows L041 UART and SPI info but the block diagram shows only SPI, and notes settings for BOOT pins to get to the bootloader upon reset. I assume the flow chart is valid for USART2 comm too. But I don't see how to get to the bootloader mode from the UART interface only.
AN3155 describes the embedded bootloader command set. Great, but I need to be in the embedded bootloader mode.
How to get from my application into the bootloader mode by using only the UART??? I will create a separate L051 command to run a function across the UART lines, but what are ALL the steps needed to get from the L041 application to a point where I can start up the bootloader, configure it, start transferring the updated application code, run a checksum, receive confirmation, and then execute the new version of flash code?
Nothing I have found so far pulls it all together into an app, and the piecemeal documentation has me very confused. It's like building a bookcase with instructions that say "Here are the set of tools used to make the bookshelf, and how to use each tool".
I've looked at many examples on GITHUB, but they all seem to assume there is a button available to hold the BOOT line.
I find info (not helpful for my case) on a separate info on
STM L0x1 docs say I shouldn't have to.
PLEASE guide me to a place that can help me move forward...My team is blocked until I resolve this! HELP!!!!
2022-06-13 03:21 PM
Does seem a large list of things you're not willing to do, or change.
And I'm not willing to explain in graphic detail to an entire team..
A carpenter should be able to build a book case with lumber he picks at the yard..
The UART alone isn't going to trigger this, you'd need some of your own code to facilitate this. You'll also need to watch what other pins listed in AN2606 are doing, because the ROM loader's looking for the first set to do something detectable, and then focuses on them.
There are typically a couple of ways of entering the System ROM's loader:
These usually require you to pull the Cortex-Mx Initial SP/PC values from the Vector Table, and then set those into the MCU registers. Basically branch/jump into the loader at an MCU level. Not STM32 specific. The base of the ROM is documented, likely in the 0x1FFxxxxx region.
It might also require you to remap the zero address space (notionally driven by how it latched BOOTx pins at RESET), so that it sees the ROM there, instead of the FLASH or RAM, and so the interrupt table will work properly. This typically is in SYSCFG. On the CM0+ you could perhaps use SCB->VTOR provided the ROM code doesn't blind write it.
All the ROM code is visible. You could perhaps disassemble that, and trace some of the expectations there.
2022-06-13 07:48 PM