2021-10-01 05:56 AM
Hi everyone, first time using freeRTOS and everything is working besides context switching from an ISR.
The STM32H743ZI has DMA (DMA1_Stream0) setup as UART Rx. This triggers an ISR that sends a queue for task synchronization, as the task that receive the queue will now process the data within the DMA Rx buffer.
Issue is the code gets hung up at "xQueueSendFromISR(CLIQueue, &temp, 0);"
The task priority is = 2 and its the only task in the system thus far
Configuration that I used/done
I am using freeRTOS Version: "V10.4.4+" Located in task.h
PORT: GCC/ARM_CM4F
HEAP: Using Heap 4
Language: C++
Note I also commented out "stm32h7xx_it.c" as there were duplicates of the handlers
Any guidance would be grateful
FreeRTOSConfig.h:
/*
* FreeRTOS V202107.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
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* 1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
/* Ensure definitions are only used by the compiler, and not by the assembler. */
#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
#include <stdint.h>
extern uint32_t SystemCoreClock;
#endif
#define configUSE_PREEMPTION 1
#define configSUPPORT_STATIC_ALLOCATION 1
#define configSUPPORT_DYNAMIC_ALLOCATION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( 480e6)
#define configTICK_RATE_HZ ( ( TickType_t ) 1000 )
#define configMAX_PRIORITIES ( 56 )
#define configMINIMAL_STACK_SIZE ( ( uint16_t ) 512 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) 15 * 1024 )
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0
#define configUSE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 8
#define configUSE_RECURSIVE_MUTEXES 1
#define configUSE_COUNTING_SEMAPHORES 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
#define configUSE_MALLOC_FAILED_HOOK 1
#define configCHECK_FOR_STACK_OVERFLOW 2
/* Defaults to size_t for backward compatibility, but can be changed
* if lengths will always be less than the number of bytes in a size_t. */
#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
/* Software timer definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY ( 2 )
#define configTIMER_QUEUE_LENGTH 10
#define configTIMER_TASK_STACK_DEPTH 256
/* Set the following definitions to 1 to include the API function, or zero
* to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 1
#define INCLUDE_xTimerPendFunctionCall 1
#define INCLUDE_xQueueGetMutexHolder 1
#define INCLUDE_uxTaskGetStackHighWaterMark 1
#define INCLUDE_eTaskGetState 1
/* Cortex-M specific definitions. */
#ifdef __NVIC_PRIO_BITS
/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
#define configPRIO_BITS __NVIC_PRIO_BITS
#else
#define configPRIO_BITS 4
#endif
/* The lowest interrupt priority that can be used in a call to a "set priority"
* function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
/* The highest interrupt priority that can be used by any interrupt service
* routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT
* CALL INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A
* HIGHER PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
/* Interrupt priorities used by the kernel port layer itself. These are generic
* to all Cortex-M ports, and do not rely on any particular library functions. */
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << ( 8 - configPRIO_BITS ) )
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << ( 8 - configPRIO_BITS ) )
/* Normal assert() semantics without relying on the provision of an assert.h
* header file. */
#define configASSERT( x ) if ( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
* standard names. */
#define vPortSVCHandler SVC_Handler
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
/* Allow system call from within FreeRTOS kernel only. */
#define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 1
/* STM32H743 has 16 MPU regions and therefore it is necessary to configure
* configTOTAL_MPU_REGIONS correctly. */
#define configTOTAL_MPU_REGIONS 16
/* The default TEX,S,C,B setting marks the SRAM as shareable and as a result,
* disables cache. Do not mark the SRAM as shareable because caching is being
* used. TEX=0, S=0, C=1, B=1. */
#define configTEX_S_C_B_SRAM ( 0x03UL )
#endif /* FREERTOS_CONFIG_H */
Code: ISR
extern "C" void DMA1_Stream0_IRQHandler() {
uint8_t temp = 1;
LL_DMA_ClearFlag_TC0(DMA1);
xQueueSendFromISR(CLIQueue, &temp, 0);
portYIELD_FROM_ISR();
}
Code: TASK
void processCLITask(void * p) {
uint8_t temp;
while(1) {
xQueueReceive(CLIQueue, &temp, portMAX_DELAY);
//Logic
}
}
2021-10-01 06:16 AM
What is your ISR priority, see comment for configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
2021-10-01 06:27 AM
Ahhh, the NVIC handler is at currently 0, so I guess thats the highest which is higher than 0. So I gotta replace that 5 with a zero I guess? and change my nvic interrupt to anything else besides 0?
2021-10-01 06:28 AM
Nevermind, I cant make it zero, but I guess just change the NVIC prio to anything > 5?
2021-10-01 06:46 AM
right, should work.
2021-10-01 06:56 AM
Ill check once I am home, thank you amigo
2021-10-01 01:19 PM
Alright, back home and tested.
So, it no longer gets stuck there, however its now directing to a fault handler saying this
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
located in startup_stm32h743zitx.s
and MCU program seize to stop