H753 ETH DMA with Fatal Bus error and all bits set in TEB = 7

[dgt]

When i Start the Eth Dma i get immediatly the Fatal Bus Error and the TEB bits are all Set.

The Reference Manual described it this way:

Bits 18:16 TEB[2:0]: Tx DMA Error Bits
This field indicates the type of error that caused a Bus Error. For example, error response on
the AHB interface.
Bit[2]: Error during data transfer by Tx DMA when 1, no Error during data transfer by Tx DMA
when 0
Bit[1]: Error during descriptor access when 1, Error during data buffer access when 0
Bit[0]: Error during read transfer when 1, Error during write transfer when 0
This field is valid only when the FBE bit is set. This field does not generate an interrupt.

In Cube i find that if all bits are set it is when the eth dma cannot read the desriptor.

#define ETH_DMA_TX_DESC_READ_ERROR_FLAG (ETH_DMACSR_TEB_BIT_2 | ETH_DMACSR_TEB_BIT_1 | ETH_DMACSR_TEB_BIT_0) in stm32h7xx_hal_eth.h

I tried to put the descriptor in all Ram like SRAM 1, 2 or 3 but i get always the same error.

Do anybody know why this happens? 

[ASEHST]

Hello @dgt,

When all TEB bits are set, it indicates that the Ethernet DMA cannot read the descriptor, resulting in a fatal bus error. This issue can be caused by memory-related problems. Please ensure that the DMA descriptors are placed in a memory region accessible by the DMA and that they are correctly aligned on a 32-bit boundary. Additionally, verify that the memory regions used by the DMA descriptors are not cached or are properly configured in the MPU.

You can refer to the examples provided in the Cube firmware as a starting point for your own code.

With Regards,