Hi, I'm following the "Programming guidelines for IEEE 1588 timestamping" from page 2792 of the RM0481. I've been working on this specifically for quite a while and I cannot even get the timestamp nanosecond or second registers to move. It feels to me like a clock issue, but unless I'm mistaken, the PTP clock (clk_ptp_ref_i from the manual(p.456)) is the same as the ETH clock (PLL1Q), which I've verified is running because I'm successfully using NetXDuo to negotiate DHCP and send/receive UDP packets successfully. I've also tried initializing the PTP Timestamp without NetXDuo just in case there was some conflict there, but that was also unsuccessful.
Here is my initialization code:
/*1. Mask the Timestamp Trigger interrupt by clearing bit 12 of Interrupt
enable register(ETH_MACIER).*/
ETH->MACIER &= ~(ETH_MACIER_TSIE);
PRINT_U32_BINARY(ETH->MACIER);
// 2. Set bit 0 of Timestamp control Register (ETH_MACTSCR) to enable
// timestamping.
ETH->MACTSCR |= ETH_MACTSCR_TSENA;
PRINT_U32_BINARY(ETH->MACTSCR);
/*3. Program Subsecond increment register (ETH_MACSSIR) based on the PTP clock
frequency. */
ETH->MACSSIR = 4 << 16;
PRINT_U32_BINARY(ETH->MACSSIR);
ETH->MACTSCR |= ETH_MACTSCR_TSCTRLSSR;
/*4. If you use the Fine Correction method, program Timestamp addend register
(ETH_MACTSAR) and set bit 5 of Timestamp control Register (ETH_MACTSCR).*/
// skipping for now
/* 5. Poll the Timestamp control Register (ETH_MACTSCR) until bit 5 is
cleared.*/
while (ETH->MACTSCR & ETH_MACTSCR_TSADDREG) {
HAL_Delay(100);
}
/* 6. Program bit 1 of Timestamp control Register (ETH_MACTSCR) to select the
Fine Update method (if required).
//skipping for now
7. Program System time seconds update register (ETH_MACSTSUR) and System time
nanoseconds update register (ETH_MACSTNUR) with the appropriate time value.*/
ETH->MACSTNUR = 0x0; //also tried 0x7fffffff
ETH->MACSTSUR = 0x0; //also tried 0xffffffff
/* 8. Set bit 2 in Timestamp control Register (ETH_MACTSCR).
The timestamp counter starts as soon as it is initialized with the value
written in the timestamp update registers. If one-step timestamping is
required:*/
ETH->MACTSCR |= ETH_MACTSCR_TSINIT;
/*a) Enable one-step timestamping by programming bit 27 of the TDES3 Context
Descriptor.
b) Program Timestamp ingress asymmetric correction register (ETH_MACTSIACR)
to update the correction field in PDelay_Req PTP messages.
9. Enable the MAC receiver and transmitter for proper timestamping.*/
while (1) {
HAL_Delay(1000);
PRINT_U32_BINARY(ETH->MACSTSR);
PRINT_U32_BINARY(ETH->MACSTNR);
}
ETH->MACSTSR and ETH->MACSTNR are always zero after this.
Thanks for any guidance you can provide!
