MCU: STM32H743 revision Y
I am preparing firmware update. Update works by storing firmware in external flash, setting a flag in backup RAM, printing goodbye message via UART and executing NVIC_SystemReset(). Then bootloader sees the flag in backup RAM, checks flash and updates firmware.
Other scenario is when device is unused, it goes to sleep by executing NVIC_SystemReset() (to turn off the watchdog). Bootloader sees by looking at backup RAM that it should send MCU to deep sleep and does that.
My latest firmware update had a lot of changes in system clock settings and UART is now clocked from PLL2Q. I noticed that speed of this PLL output has a side effect, that, when it is set to certain speeds, bootloader is not able to start and gets stuck in UART init waiting for USART_ISR_REACK flag. For example:
When in firmware HSE is 16 MHz and PLL2 is set to M = 16, N = 192 and the Q output is the source for UART, it works perfectly in firmware in all cases but:
if divider Q=100 -> 1.92 MHz clock for UART, bootloader gets stuck. (on waiting for USART_ISR_REACK flag)
If divider Q=10 -> 19.2 MHz clock for UART, bootloader gets stuck sometimes. Roughly in one of five resets.
If divider Q=5 -> 38.4 MHz clock for UART, bootloader did not got stuck in ~800 attempts + some testing hours. (does it mean never?)
If before going to sleep I change UART clock source to default (APB2), bootloader does not get stuck, but I can't cover all restarts like this (for example independent watchdog restarts).
The bootloader has some flaws, for example, it does not specify UART clock source and relies on default settings, as it expects everything is default after reset. I don't have a good way to update the bootloader, so I am looking for a way to solve this "incompatibility" in the firmware side. That raised some questions for me for which I have not found answers in documentation.
Question nr 1:
In ST's training presentation I found this: "System reset, which resets all the registers except certain registers for the Reset and Clock Controller and Power Controller", but I did not found which exact registers are not reset. For example one of the registers is RCC_D2CCIP2R which controls what clock drives UART. Is this register reset or not on system reset?
Question nr 2:
Is there a way to know, that with certain value of PLL2 divider Q (certain UART clock source speed) I will never get stuck in bootloader after reset?
