You can do this with cmsis-dsp but you'll have to add your own implementation using the cmsis-dsp framework. Specifically, you'll need to provide your own twiddle factor and bit-reversal tables. There is a python script in cmsis-dsp that you can use to generate these:
DSP_Lib/SupportFunctions/arm_cfft_radix4_init_f32_gen.py
Then you can quite easily build up the 16k FFT following ARM's existing functions as a reference template.
Regarding performance, memory requirement will be something to pay attention to and you'll need to ensure that optimisation is on for speed and size, and I- and D- cache enabled.
A key thing will be to choose your input number format before starting the implementation. Words (accumulated variables) grow according to log2(FFT length) and unless you're doing a full floating point implementation your implementation will need to use specific cmsis-dsp functions for your data type. e.g. If you were processing data from an ADC you may want to take a q15 as the input number format, but care would then be taken to avoid saturation/overflow, which you could avoid by converting to q32 at the cost of RAM usage and cycles.
Unfortunately this isn't the kind of turn-key solution that you might have hoped for, but even if you're not very familiar with the FFT there are a huge number of very good resources that explain how it works. The algorithms used boil down to simple adds/subtracts and cmsis-dsp has all of the required primitives (butterfly operations).
