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On STM32G431 is the BOOT0 pin (PB8) no pull-ups or weak pullup?

BTrem.1
Senior II

On the STM32G431x6/x8/xB UFQFPN48 I've been assuming that BOOT0 pin PB8 was a weak pull-up during reset, but in trying to track this I think it has no pull-ups/ pull-downs. Is this the case?

1 ACCEPTED SOLUTION

Accepted Solutions
TDK
Guru

You can use the nBOOT0 option byte to override the value on the pin. Otherwise, you need to ensure it's low or high, depending on your intention.

It should be low if you want to run user code. Whether you do that with a pulldown resistor or an FPGA pin is fine. However, you need to ensure it's low when the STM32 is booting up. The best way to ensure this is an external resistor on the line.

Pulling it up will run the bootloader on startup, rather than user code.

Leaving it floating leads to undefined behavior (unless overridden with option byte mentioned above).

If you feel a post has answered your question, please click "Accept as Solution".

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3 REPLIES 3

Floats, if you use it for BOOT0, pull it low externally to ensure reliable operation. Only the JTAG/SWD pins have pull up/down at power on

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BTrem.1
Senior II

Presently we use an FPGA open drain output to pull it low. It does not need a pull-up? A float is okay? Thanks!

TDK
Guru

You can use the nBOOT0 option byte to override the value on the pin. Otherwise, you need to ensure it's low or high, depending on your intention.

It should be low if you want to run user code. Whether you do that with a pulldown resistor or an FPGA pin is fine. However, you need to ensure it's low when the STM32 is booting up. The best way to ensure this is an external resistor on the line.

Pulling it up will run the bootloader on startup, rather than user code.

Leaving it floating leads to undefined behavior (unless overridden with option byte mentioned above).

If you feel a post has answered your question, please click "Accept as Solution".