2025-09-14 8:25 AM
Hi
I am designing a small circular PCB with the following specifications. Due to size limitations, the antenna cannot exceed 9mm, which prevents me from achieving the recommended 4.8µH of inductance. Is it acceptable to compensate for this by increasing the matching capacitance?
Additionally, I have two other questions:
1. what is the recommended spacing for an NFC antenna from the edge of the PCB?
2. Also, which formula do you use to calculate the inductance Circular or spiral () since I get two different results.
Please let me know if you need additional information.
Thank you
(mm) | |
PCB Radios | 10.5 |
N Turns | 3 |
Space from Edge | 0.5 |
Track Width | 0.28 |
Spacing | 0.13 |
First | 9.86 |
Second | 9.45 |
Third | 9.04 |
Spiral L | 0.35uH |
Circular L | 76nH |
2025-09-15 6:18 AM
Hello,
I guess you have read the application note AN2972 (https://www.st.com/resource/en/application_note/an2972-how-to-design-an-antenna-for-dynamic-nfc-tags-stmicroelectronics.pdf) for the antenna calculation formulae.
In this application note, the formulae called "Circular antenna" is for a solenoid antenna, meaning an antenna made by wiring a cable around a solenoid. In that case, the antenna is not "flat" but is vertical.
For an antenna made on a PCB, you should use the "Spiral antenna" formulae.
In your case, it is not clear for me if the 10mm is the diameter of the antenna or the radius of the antenna?
If the calculated inductance is too low and you can't increase the antenna size, you can try to increase the number of turns. As you can see in the equation, the inductance is square factor of the number of turns, so increasing the number of turns have a significant impact.
Then, if your inductance is still too low (the resonant frequency will then by too high), you can try to add a parallel tuning capacitor to compensate and to decrease the tunning frequency. Nevertheless, I recommend you trying to design an antenna that is the closest to the goal impedance first and only try to fine tune with a capacitor afterward.
Best regards.
2025-09-15 7:02 AM - edited 2025-09-15 6:15 PM
Thank you for your response. I have reviewed that document and that where I get formula from.
I apologize for any misunderstanding; the 10mm value refers to the radius of the board.
1. To increase the number of turns, I would need to reduce the trace width to 0.1 and spacing to 0.1wmm, with 5 turn which would result in an inductance of 1uH. Do you believe this will be better, since suggested inductance is around 4uH.
2. I would still appreciate knowing the recommended spacing between the antenna and the edge of the board.
3. Furthermore, you mentioned getting "closest to the goal impedance." Base An2972 Zant = Ra + jXA. But how do you design as close.
I sincerely appreciate your assistance.
Thank you.
2025-09-16 6:24 AM
Hello,
With 5 turns, you will get a tuning of ~29.8MHz, which is much too high compared to the targeted 13.56MHz. To get close to 13.56MHz, you would need to add a // capa of ~100pF. Having such a big capacitor will increase the quality factor which is not very good for the communication from tag to reader.
If possible, I would suggest increasing the number of turns to 10. With 10mm outside radius and 8.1mm inner radius, you would have 0.1mm trace with 0.1mm spacing. Without an additional capa, the tuning is 16MHz. With a 10pF capa, the tuning is 13.8MHz, which is good.
If 0.1mm traces are too thin, you will need to reduce the inner radius more and increase the number of turns again.
Concerning the clearance to the PCB edge, it really depends on what's on the PCB edge. If there is no ground plan or metal, then there is no need for any clearance. If there is metal or ground plan, then a clearance is needed, but it's difficult to provide any number. The larger is the better.
Best regards.