2020-10-22 03:34 AM
Hi,
I've noticed that C204 and C205 (tied to the ST25R3916 VDD_RF pin) are populated on the PCB Bottom Layer of ST25R3916-DISCO (The same applies to the NUCLEO board). These are the only components (necessary for the proper functioning of the board) that are soldered on this layer. My (logical) goal is to place the all components of my custom board on TOP Layer for a single reflow process.
Therefore I have a couple of questions:
Thanks in advance,
gaston
Solved! Go to Solution.
2020-10-22 04:27 AM
Hello Gaston,
In general the caps connected to the VDD_DR pin ( C204 and C205) should be low ohmic connected to VDD_DR and GND_DR.
VDD_DR is the positive supply of the output driver and GND_DR is the negative supply of the output driver. In case of the ST25R3916-DISCO / NFC06A1, this connection has been ensured by 3 vias for VDD_DR and the 9 - thermal vias for GND_DR.
Another nice solution has been done on the ST25R3911B-DISCO and NFC05A1. Here the positive driver supply is called VSP_RF and the negative supply is called VSN_RF.
The decoupling caps for VSP_RF and VSN_RF are kept on top. The EMC Inductors are connected at the bottom layer to the RFO pins.
How critical is it to place these two capacitors on the TOP face?
Placing the capacitors on top layer is in general good. There are two things you should keep in mind:
1.) Both negative and positive decoupling connection should be as short and low ohmic as possible.
2.) The traces between RFO pins and EMI inductor should be kept as short as possible.
How can it affect the operation/performance/stability of the ST25R3916?
Performance and stability are not effected. If the trace / resistance between decoupling caps and pins is too long / high, you might see unwanted over/undershoot in the HF field. This might be a problem when doing wave shape compliance of EMVCo, NFC Forum or ISO. There is no such problem on the 3911B/3916 Disco or Nucleo boards. If the traces are too long you might also experience problems when doing FCC or CE compliance testing. The ST25R3916 has an improved driver stage. Compared to the 3911B you will experience much less problems in this regard.
BR Travis
2020-10-22 04:27 AM
Hello Gaston,
In general the caps connected to the VDD_DR pin ( C204 and C205) should be low ohmic connected to VDD_DR and GND_DR.
VDD_DR is the positive supply of the output driver and GND_DR is the negative supply of the output driver. In case of the ST25R3916-DISCO / NFC06A1, this connection has been ensured by 3 vias for VDD_DR and the 9 - thermal vias for GND_DR.
Another nice solution has been done on the ST25R3911B-DISCO and NFC05A1. Here the positive driver supply is called VSP_RF and the negative supply is called VSN_RF.
The decoupling caps for VSP_RF and VSN_RF are kept on top. The EMC Inductors are connected at the bottom layer to the RFO pins.
How critical is it to place these two capacitors on the TOP face?
Placing the capacitors on top layer is in general good. There are two things you should keep in mind:
1.) Both negative and positive decoupling connection should be as short and low ohmic as possible.
2.) The traces between RFO pins and EMI inductor should be kept as short as possible.
How can it affect the operation/performance/stability of the ST25R3916?
Performance and stability are not effected. If the trace / resistance between decoupling caps and pins is too long / high, you might see unwanted over/undershoot in the HF field. This might be a problem when doing wave shape compliance of EMVCo, NFC Forum or ISO. There is no such problem on the 3911B/3916 Disco or Nucleo boards. If the traces are too long you might also experience problems when doing FCC or CE compliance testing. The ST25R3916 has an improved driver stage. Compared to the 3911B you will experience much less problems in this regard.
BR Travis