2026-04-03 10:09 AM
Hi all,
Hoping this is this right subsection to post the following question...
I'm reading the STPD01 datasheet and it states its available I2C addresses : 4, 5, 6, and 7.
Reading to general I2C documentation, it seems that these addresses are reserved to I2C HS-Mode.
So, is STPD01 an HS-Mode controller or a regular (100kHz) device?
Links:
- https://i2cdevices.org/addresses
- https://en.wikipedia.org/wiki/I2C
- https://learn.adafruit.com/i2c-addresses/the-list
Solved! Go to Solution.
2026-05-26 4:17 AM
The address ranges 0x04...0x07 specified in the original I2C bus specification UM10204, from which the Wiki copied the table, were or are not to be understood as a blanket prohibition for all I2C devices, but rather as a reserved address range with a specific purpose, typically for high-speed-capable bus participants or controller configurations. UM10204 mentions this in section 3.1.12:
If it is known that the reserved address is never going to be used for its intended purpose, a reserved address can be used for a target address.
So I can imagine that the chip developers therefore regarded this address range as free and used it accordingly.
If you are concerned about collisions with HS devices on the same bus, you can separate the STPD01 bus from the other participants by using a different I2C port, either on the same MCU/MPU, or via an I2C bus splitter.
Does that ease your doubts (a little)?
Regards
/Peter
2026-04-07 2:05 AM
Welcome @fabr, to the community!
The (8-bit) addresses 0x00...0x07 mentioned in the I2C specification (e.g. found on Wikipedia) refer to the complete (8-bit) address, including the 4 MSB as well as bit 0 (R/W). However, the address range of the STPD01 is defined by the bits specified in the data sheet, section 7.12.2, where bit 2 and bit 1 can be freely chosen by setting the ADD1 and ADD0 pins to the corresponding level. Since bit 0 only determines the data direction from the host's perspective (Read/Write), only the upper 7 bits are simplistically called the "address," which for the STPD01 lies between 0x00...0x07 (7-bit), corresponding to the 8-bit address range 0x08...0x0f. As correctly identified by you, the STPD01 can therefore be addressed with the 7-bit addresses 4...7.
Regarding the links you mentioned:
Compiling a list of all available I2C devices would be rather pointless, as a look into the respective data sheet is sufficient to find this information.
Your last question refers to the HS mode: HS stands for High Speed, i.e. 3.4 MHz. However, the STPD01 can only operate at a maximum in Fast Mode (400 kHz) (see data sheet, table 6, parameter SCLf).
Does this answer your questions?
Regards
/Peter
2026-04-07 2:26 PM
Thanks for the complete reply, but I still have a doubt. Assuming the common convention "the upper 7 bits are simplistically called the "address" (used also in the Wiki article), if I properly interpret the following table (extracted from wiki), the 6-th line tells that addresses 0x4 to 0x7 are reserved for HS-controller code. As you stated, STPD01 doesn't support HS, so I still don't get why this chip stays in this range.
I know Wiki is not the source of truth, but as I previously linked, many relevant players state the exact same knowledge.
To be clear, I'm just trying to figure out if it is a suggestion or a strict rule, and maybe I'm misinterpreting something.
2026-04-09 5:20 AM
Well, the STPD01 is not an HS-mode I2C device, but a Fast-mode slave device and supports clock rates up to 400kHz only.
The address range 4 to 7 stated in the data sheet refers to the device’s 7-bit slave address configuration via the ADD0/ADD1 pins and is valid for this device. Generic reserved-address tables describe the I2C protocol in general, but they do not supersede the device-specific addressing information given in the data sheet.
Please note that I2C is generally limited to local communication (originally designed by Philips for Inter-Integrated Circuit communication for e.g. TV or CD players), where rules established for consumer devices in the last millennium no longer necessarily apply.
Regards
/Peter
2026-05-23 8:20 AM
I know this information (the fact that I2C is a historical protocol and some rules may not be relevant nowadays; the fact that the datasheet states how the device actually works; the fact that the device works at max 400 kHz), but I was a bit upset because there is a common convention and, IMHO, apparently no reason to break it.
If there is a concrete motivation to use these 4 unconventional addresses, I will be glad to read the answer and accept it as the thread solution.
2026-05-26 4:17 AM
The address ranges 0x04...0x07 specified in the original I2C bus specification UM10204, from which the Wiki copied the table, were or are not to be understood as a blanket prohibition for all I2C devices, but rather as a reserved address range with a specific purpose, typically for high-speed-capable bus participants or controller configurations. UM10204 mentions this in section 3.1.12:
If it is known that the reserved address is never going to be used for its intended purpose, a reserved address can be used for a target address.
So I can imagine that the chip developers therefore regarded this address range as free and used it accordingly.
If you are concerned about collisions with HS devices on the same bus, you can separate the STPD01 bus from the other participants by using a different I2C port, either on the same MCU/MPU, or via an I2C bus splitter.
Does that ease your doubts (a little)?
Regards
/Peter
2026-05-26 11:03 AM
The statement you cited is what I was looking for: an official third-party declaration that allows to escape from the reserved I2C addresses table. And, unfortunately, I didn't read the NXP UM10204.
Thanks for your time!